arm64: dts: ls1046a: Add MSI dts node
authorMinghuan Lian <Minghuan.Lian@nxp.com>
Wed, 5 Jul 2017 06:59:00 +0000 (14:59 +0800)
committerMarc Zyngier <marc.zyngier@arm.com>
Thu, 31 Aug 2017 15:19:26 +0000 (16:19 +0100)
LS1046a includes 3 MSI controllers.
Each controller supports 128 interrupts.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi

index 2755cd1ce611d29986a1740fc776074426da528a..dde455289c16da32ad42df1313af2e054eeb4a5b 100644 (file)
@@ -6,6 +6,7 @@ Required properties:
              Layerscape PCIe MSI controller block such as:
               "fsl,ls1021a-msi"
               "fsl,ls1043a-msi"
+              "fsl,ls1046a-msi"
 - msi-controller: indicates that this is a PCIe MSI controller node
 - reg: physical base address of the controller and length of memory mapped.
 - interrupts: an interrupt to the parent interrupt controller.
index dc1640be0345d3be0b0a601421edc7b5cbb9f433..c8ff0baddf1d06858091df65a66d60c348cc0e43 100644 (file)
                        interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clockgen 4 1>;
                };
+
+               msi1: msi-controller@1580000 {
+                       compatible = "fsl,ls1046a-msi";
+                       msi-controller;
+                       reg = <0x0 0x1580000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               msi2: msi-controller@1590000 {
+                       compatible = "fsl,ls1046a-msi";
+                       msi-controller;
+                       reg = <0x0 0x1590000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               msi3: msi-controller@15a0000 {
+                       compatible = "fsl,ls1046a-msi";
+                       msi-controller;
+                       reg = <0x0 0x15a0000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
        };
 
        reserved-memory {