static int currentStep;
static int lastStep;
static struct work_struct wq_work;
-unsigned int utilization;
+static u32 last_utilization_pp;
+static u32 last_utilization_gp;
+static u32 last_utilization_gp_pp;
unsigned int mali_dvfs_clk[] = {
};
enum mali_pp_scale_threshold_t {
+ MALI_PP_THRESHOLD_30,
MALI_PP_THRESHOLD_40,
MALI_PP_THRESHOLD_50,
+ MALI_PP_THRESHOLD_60,
MALI_PP_THRESHOLD_90,
MALI_PP_THRESHOLD_MAX,
};
static u32 mali_pp_scale_threshold [] = {
+ (30 * 256) / 100.0 + 0.5,
(40 * 256) / 100.0 + 0.5,
(50 * 256) / 100.0 + 0.5,
+ (60 * 256) / 100.0 + 0.5,
(90 * 256) / 100.0 + 0.5,
};
}
void mali_core_scaling_init(int num_pp_cores, int clock_rate_index)
-{
+{
INIT_WORK(&wq_work, do_scaling);
num_cores_total = num_pp_cores;
flush_scheduled_work();
}
-#define PERCENT_OF(percent, max) ((int) ((percent)*(max)/100.0 + 0.5))
-
void mali_pp_scaling_update(struct mali_gpu_utilization_data *data)
{
- /*
- * This function implements a very trivial PP core scaling algorithm.
- *
- * It is _NOT_ of production quality.
- * The only intention behind this algorithm is to exercise and test the
- * core scaling functionality of the driver.
- * It is _NOT_ tuned for neither power saving nor performance!
- *
- * Other metrics than PP utilization need to be considered as well
- * in order to make a good core scaling algorithm.
- */
-
+ currentStep = MALI_CLOCK_637;
+
MALI_DEBUG_PRINT(3, ("Utilization: (%3d, %3d, %3d), cores enabled: %d/%d\n", data->utilization_gpu, data->utilization_gp, data->utilization_pp, num_cores_enabled, num_cores_total));
/* NOTE: this function is normally called directly from the utilization callback which is in
}
else if (mali_pp_scale_threshold[MALI_PP_THRESHOLD_40]< data->utilization_pp)
{
- /* do nothing */
+ currentStep = MALI_CLOCK_425;
+ schedule_work(&wq_work);
}
else if (0 < data->utilization_pp)
{
- disable_one_core();
+ if (num_cores_enabled == 1) {
+ if ( mali_pp_scale_threshold[MALI_PP_THRESHOLD_30]< data->utilization_pp )
+ currentStep = MALI_CLOCK_318;
+ else
+ currentStep = MALI_CLOCK_425;
+ schedule_work(&wq_work);
+ } else {
+ disable_one_core();
+ }
}
else
{
void mali_pp_fs_scaling_update(struct mali_gpu_utilization_data *data)
{
- MALI_DEBUG_PRINT(2, ("Utilization: (%3d, %3d, %3d), cores enabled: %d/%d\n", data->utilization_gpu, data->utilization_gp, data->utilization_pp, num_cores_enabled, num_cores_total));
- MALI_DEBUG_PRINT(2, (" %d \n", currentStep));
- utilization = data->utilization_gpu;
+ MALI_DEBUG_PRINT(3, ("Utilization: (%3d, %3d, %3d), cores enabled: %d/%d\n", data->utilization_gpu, data->utilization_gp, data->utilization_pp, num_cores_enabled, num_cores_total));
+ MALI_DEBUG_PRINT(3, (" %d \n", currentStep));
+ u32 utilization = data->utilization_gpu;
if (utilization > mali_dvfs_threshold[currentStep].upthreshold) {
if (utilization < mali_utilization_high && currentStep < MALI_CLOCK_INDX_MAX)
else
currentStep = MALI_CLOCK_637;
- if (data->utilization_pp > 230) // 90%
+ if (data->utilization_pp > MALI_PP_THRESHOLD_90) // 90%
enable_max_num_cores();
else
enable_one_core();
currentStep--;
MALI_DEBUG_PRINT(2, ("Mali clock set %d..\n",currentStep));
} else {
- if (data->utilization_pp < mali_pp_scale_threshold[0])
+ if (data->utilization_pp < mali_pp_scale_threshold[MALI_PP_THRESHOLD_40])
disable_one_core();
return;
}
void mali_fs_scaling_update(struct mali_gpu_utilization_data *data)
{
-
- utilization = data->utilization_gpu;
+ u32 utilization = data->utilization_gpu;
if (utilization > mali_dvfs_threshold[currentStep].upthreshold) {
currentStep = MALI_CLOCK_637;
void set_mali_freq_idx(u32 idx)
{
- MALI_DEBUG_ASSERT(clock_rate_index < MALI_CLOCK_INDX_MAX);
+ MALI_DEBUG_ASSERT(idx < MALI_CLOCK_INDX_MAX);
currentStep = idx;
lastStep = MALI_CLOCK_INDX_MAX;
mali_default_clock_step = currentStep;
/* Configure dvfs mode */
enum mali_scale_mode_t {
MALI_PP_SCALING,
- MALI_FS_SCALING,
MALI_PP_FS_SCALING,
MALI_SCALING_DISABLE,
+ MALI_FS_SCALING,
MALI_SCALING_MODE_MAX
};
-static int scaling_mode = MALI_PP_FS_SCALING;
+static int scaling_mode = MALI_PP_SCALING;
module_param(scaling_mode, int, 0664);
MODULE_PARM_DESC(scaling_mode, "0 disable, 1 pp, 2 fs, 4 double");
static int last_scaling_mode;
.fb_start = 0x84000000,
#endif
.fb_size = 0x06000000,
- .utilization_interval = 1000, /* 1000ms */
+ .utilization_interval = 1000,
.utilization_callback = mali_gpu_utilization_callback,
.pmu_switch_delay = 0xFFFF, /* do not have to be this high on FPGA, but it is good for testing to have a delay */
};
int num_pp_cores = MALI_PP_NUMBER;
mali_clock_set(mali_dvfs_clk[mali_default_clock_step]);
- printk(" %x \n", mali_dvfs_clk[mali_default_clock_step]);
if (mali_gpu_data.shared_mem_size < 10) {
MALI_DEBUG_PRINT(2, ("mali os memory didn't configered, set to default(512M)\n"));