ARM: dts: tango4: Initial device trees

This device tree was tested on a Sigma Designs SMP8758 Vantage-1172
Rev E1 development board.

Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index c1ac5f2932d156f3b4f21eaebc7a961c945ba8bf..c34dcbde85396863809d3a9298ed915c7da68184 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -693,6 +693,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
 dtb-$(CONFIG_MACH_SUN9I) += \
        sun9i-a80-optimus.dtb \
        sun9i-a80-cubieboard4.dtb
+dtb-$(CONFIG_ARCH_TANGO) += \
+       tango4-vantage-1172.dtb
 dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
        tegra20-harmony.dtb \
        tegra20-iris-512.dtb \

diff --git a/arch/arm/boot/dts/tango4-common.dtsi b/arch/arm/boot/dts/tango4-common.dtsi
new file mode 100644 (file)
index 0000000..ef665d2
--- /dev/null
+++ b/arch/arm/boot/dts/tango4-common.dtsi
@@ -0,0 +1,130 @@
+/*
+ * Based on Mans Rullgard's Tango3 DT
+ * https://github.com/mansr/linux-tangox
+ */
+
+#define CPU_CLK 0
+#define SYS_CLK 1
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+       interrupt-parent = <&gic>;
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       periph_clk: periph_clk {
+               compatible = "fixed-factor-clock";
+               clocks = <&clkgen CPU_CLK>;
+               clock-mult = <1>;
+               clock-div  = <2>;
+               #clock-cells = <0>;
+       };
+
+       mpcore {
+               compatible = "simple-bus";
+               ranges = <0x00000000 0x20000000 0x2000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               scu@0 {
+                       compatible = "arm,cortex-a9-scu";
+                       reg = <0x0 0x100>;
+               };
+
+               twd@600 {
+                       compatible = "arm,cortex-a9-twd-timer";
+                       reg = <0x600 0x10>;
+                       interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
+                       clocks = <&periph_clk>;
+                       always-on;
+               };
+
+               gic: interrupt-controller@1000 {
+                       compatible = "arm,cortex-a9-gic";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x1000 0x1000>, <0x100 0x100>;
+               };
+       };
+
+       l2cc: l2-cache-controller@20100000 {
+               compatible = "arm,pl310-cache";
+               reg = <0x20100000 0x1000>;
+               cache-level = <2>;
+               cache-unified;
+       };
+
+       soc {
+               compatible = "simple-bus";
+               interrupt-parent = <&irq0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               xtal: xtal {
+                       compatible = "fixed-clock";
+                       clock-frequency = <27000000>;
+                       #clock-cells = <0>;
+               };
+
+               clkgen: clkgen@10000 {
+                       compatible = "sigma,tango4-clkgen";
+                       reg = <0x10000 0x40>;
+                       clocks = <&xtal>;
+                       #clock-cells = <1>;
+               };
+
+               tick-counter@10048 {
+                       compatible = "sigma,tick-counter";
+                       reg = <0x10048 0x4>;
+                       clocks = <&xtal>;
+               };
+
+               uart: serial@10700 {
+                       compatible = "ralink,rt2880-uart";
+                       reg = <0x10700 0x30>;
+                       interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-frequency = <7372800>;
+                       reg-shift = <2>;
+               };
+
+               eth0: ethernet@26000 {
+                       compatible = "sigma,smp8734-ethernet";
+                       reg = <0x26000 0x800>;
+                       interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clkgen SYS_CLK>;
+               };
+
+               intc: interrupt-controller@6e000 {
+                       compatible = "sigma,smp8642-intc";
+                       reg = <0x6e000 0x400>;
+                       ranges = <0 0x6e000 0x400>;
+                       interrupt-parent = <&gic>;
+                       interrupt-controller;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       irq0: irq0@000 {
+                               reg = <0x000 0x100>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       irq1: irq1@100 {
+                               reg = <0x100 0x100>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       irq2: irq2@300 {
+                               reg = <0x300 0x100>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                               interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+               };
+       };
+};

diff --git a/arch/arm/boot/dts/tango4-smp8758.dtsi b/arch/arm/boot/dts/tango4-smp8758.dtsi
new file mode 100644 (file)
index 0000000..7ed88ee
--- /dev/null
+++ b/arch/arm/boot/dts/tango4-smp8758.dtsi
@@ -0,0 +1,31 @@
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               enable-method = "sigma,tango4-smp";
+
+               cpu0: cpu@0 {
+                       compatible = "arm,cortex-a9";
+                       next-level-cache = <&l2cc>;
+                       device_type = "cpu";
+                       reg = <0>;
+               };
+
+               cpu1: cpu@1 {
+                       compatible = "arm,cortex-a9";
+                       next-level-cache = <&l2cc>;
+                       device_type = "cpu";
+                       reg = <1>;
+               };
+       };
+
+       pmu {
+               compatible = "arm,cortex-a9-pmu";
+               interrupt-affinity = <&cpu0>, <&cpu1>;
+               interrupts =
+                       <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                       <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+       };
+};

diff --git a/arch/arm/boot/dts/tango4-vantage-1172.dts b/arch/arm/boot/dts/tango4-vantage-1172.dts
new file mode 100644 (file)
index 0000000..3e5b9c8
--- /dev/null
+++ b/arch/arm/boot/dts/tango4-vantage-1172.dts
@@ -0,0 +1,37 @@
+/dts-v1/;
+
+#include "tango4-smp8758.dtsi"
+#include "tango4-common.dtsi"
+
+/ {
+       model = "Sigma Designs SMP8758 Vantage-1172 Rev E1";
+       compatible = "sigma,vantage-1172", "sigma,smp8758", "sigma,tango4";
+
+       aliases {
+               serial = &uart;
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x80000000 0x80000000>; /* 2 GB */
+       };
+
+       chosen {
+               stdout-path = "serial:115200n8";
+       };
+};
+
+&eth0 {
+       phy-connection-type = "rgmii";
+       phy-handle = <&eth0_phy>;
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       /* Atheros AR8035 */
+       eth0_phy: ethernet-phy@4 {
+               compatible = "ethernet-phy-id004d.d072",
+                            "ethernet-phy-ieee802.3-c22";
+               interrupts = <37 IRQ_TYPE_EDGE_RISING>;
+               reg = <4>;
+       };
+};