drm/i915/dp: use the drm dp helper for determining sink tps3 support

No functional changes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: s/intel_dp_tps/drm_dp_tps/.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index ea114690ffd4f5141713b5257443504909bd6588..b794439582587e4acae489f9a3051b5b2d935da9 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4023,8 +4023,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
        }
 
        /* Training Pattern 3 support, both source and sink */
-       if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 &&
-           intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED &&
+       if (drm_dp_tps3_supported(intel_dp->dpcd) &&
            (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)) {
                intel_dp->use_tps3 = true;
                DRM_DEBUG_KMS("Displayport TPS3 supported\n");