drm/radeon: halt engines before disabling MC (6xx/7xx)

It's better to halt the engines before we disable the MC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 997707b2a33eb89a57c720dcc4938a602c220552..abb143c0bdca7816217a7b57f34887f910e46881 100644 (file)
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1397,11 +1397,6 @@ static void r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
 
        r600_print_gpu_status_regs(rdev);
 
-       rv515_mc_stop(rdev, &save);
-       if (r600_mc_wait_for_idle(rdev)) {
-               dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
-       }
-
        /* Disable CP parsing/prefetching */
        if (rdev->family >= CHIP_RV770)
                WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1) | S_0086D8_CP_PFP_HALT(1));
@@ -1420,6 +1415,11 @@ static void r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
 
        mdelay(50);
 
+       rv515_mc_stop(rdev, &save);
+       if (r600_mc_wait_for_idle(rdev)) {
+               dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
+       }
+
        if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE)) {
                if (rdev->family >= CHIP_RV770)
                        grbm_soft_reset |= S_008020_SOFT_RESET_DB(1) |