/* Wait till the bus is free */
status = spin_event_timeout(
- !((in_be32(®s->mdio_stat)) & MDIO_STAT_BSY), TIMEOUT, 0);
+ !((ioread32be(®s->mdio_stat)) & MDIO_STAT_BSY), TIMEOUT, 0);
if (!status) {
dev_err(dev, "timeout waiting for bus to be free\n");
return -ETIMEDOUT;
/* Wait till the MDIO write is complete */
status = spin_event_timeout(
- !((in_be32(®s->mdio_data)) & MDIO_DATA_BSY), TIMEOUT, 0);
+ !((ioread32be(®s->mdio_data)) & MDIO_DATA_BSY), TIMEOUT, 0);
if (!status) {
dev_err(dev, "timeout waiting for operation to complete\n");
return -ETIMEDOUT;
u32 mdio_ctl, mdio_stat;
int ret;
- mdio_stat = in_be32(®s->mdio_stat);
+ mdio_stat = ioread32be(®s->mdio_stat);
if (regnum & MII_ADDR_C45) {
/* Clause 45 (ie 10G) */
dev_addr = (regnum >> 16) & 0x1f;
mdio_stat &= ~MDIO_STAT_ENC;
}
- out_be32(®s->mdio_stat, mdio_stat);
+ iowrite32be(mdio_stat, ®s->mdio_stat);
ret = xgmac_wait_until_free(&bus->dev, regs);
if (ret)
/* Set the port and dev addr */
mdio_ctl = MDIO_CTL_PORT_ADDR(phy_id) | MDIO_CTL_DEV_ADDR(dev_addr);
- out_be32(®s->mdio_ctl, mdio_ctl);
+ iowrite32be(mdio_ctl, ®s->mdio_ctl);
/* Set the register address */
if (regnum & MII_ADDR_C45) {
- out_be32(®s->mdio_addr, regnum & 0xffff);
+ iowrite32be(regnum & 0xffff, ®s->mdio_addr);
ret = xgmac_wait_until_free(&bus->dev, regs);
if (ret)
}
/* Write the value to the register */
- out_be32(®s->mdio_data, MDIO_DATA(value));
+ iowrite32be(MDIO_DATA(value), ®s->mdio_data);
ret = xgmac_wait_until_done(&bus->dev, regs);
if (ret)
uint16_t value;
int ret;
- mdio_stat = in_be32(®s->mdio_stat);
+ mdio_stat = ioread32be(®s->mdio_stat);
if (regnum & MII_ADDR_C45) {
dev_addr = (regnum >> 16) & 0x1f;
mdio_stat |= MDIO_STAT_ENC;
mdio_stat &= ~MDIO_STAT_ENC;
}
- out_be32(®s->mdio_stat, mdio_stat);
+ iowrite32be(mdio_stat, ®s->mdio_stat);
ret = xgmac_wait_until_free(&bus->dev, regs);
if (ret)
/* Set the Port and Device Addrs */
mdio_ctl = MDIO_CTL_PORT_ADDR(phy_id) | MDIO_CTL_DEV_ADDR(dev_addr);
- out_be32(®s->mdio_ctl, mdio_ctl);
+ iowrite32be(mdio_ctl, ®s->mdio_ctl);
/* Set the register address */
if (regnum & MII_ADDR_C45) {
- out_be32(®s->mdio_addr, regnum & 0xffff);
+ iowrite32be(regnum & 0xffff, ®s->mdio_addr);
ret = xgmac_wait_until_free(&bus->dev, regs);
if (ret)
}
/* Initiate the read */
- out_be32(®s->mdio_ctl, mdio_ctl | MDIO_CTL_READ);
+ iowrite32be(mdio_ctl | MDIO_CTL_READ, ®s->mdio_ctl);
ret = xgmac_wait_until_done(&bus->dev, regs);
if (ret)
return ret;
/* Return all Fs if nothing was there */
- if (in_be32(®s->mdio_stat) & MDIO_STAT_RD_ER) {
+ if (ioread32be(®s->mdio_stat) & MDIO_STAT_RD_ER) {
dev_err(&bus->dev,
"Error while reading PHY%d reg at %d.%hhu\n",
phy_id, dev_addr, regnum);
return 0xffff;
}
- value = in_be32(®s->mdio_data) & 0xffff;
+ value = ioread32be(®s->mdio_data) & 0xffff;
dev_dbg(&bus->dev, "read %04x\n", value);
return value;