Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux...

Conflicts:
	arch/arm/mach-shmobile/clock-sh73a0.c

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

diff --cc arch/arm/mach-shmobile/clock-sh73a0.c
index 8ea8c810144bf335256d5f73e1bf9bd0880c947b,1370a89ca358ba548c80ae5ed3ec29b52156b501..34944d01bf1ed99db00a49f4b9845271ddce3a3e
--- 1/arch/arm/mach-shmobile/clock-sh73a0.c
--- 2/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@@ -284,84 -246,27 +285,84 @@@ enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3
        DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P,
        DIV6_NR };
  
 +static struct clk *vck_parent[8] = {
 +      [0] = &pll1_div2_clk,
 +      [1] = &pll2_clk,
 +      [2] = &sh73a0_extcki_clk,
 +      [3] = &sh73a0_extal2_clk,
 +      [4] = &main_div2_clk,
 +      [5] = &sh73a0_extalr_clk,
 +      [6] = &main_clk,
 +};
 +
 +static struct clk *pll_parent[4] = {
 +      [0] = &pll1_div2_clk,
 +      [1] = &pll2_clk,
 +      [2] = &pll1_div13_clk,
 +};
 +
 +static struct clk *hsi_parent[4] = {
 +      [0] = &pll1_div2_clk,
 +      [1] = &pll2_clk,
 +      [2] = &pll1_div7_clk,
 +};
 +
 +static struct clk *pll_extal2_parent[] = {
 +      [0] = &pll1_div2_clk,
 +      [1] = &pll2_clk,
 +      [2] = &sh73a0_extal2_clk,
 +      [3] = &sh73a0_extal2_clk,
 +};
 +
 +static struct clk *dsi_parent[8] = {
 +      [0] = &pll1_div2_clk,
 +      [1] = &pll2_clk,
 +      [2] = &main_clk,
 +      [3] = &sh73a0_extal2_clk,
 +      [4] = &sh73a0_extcki_clk,
 +};
 +
  static struct clk div6_clks[DIV6_NR] = {
 -      [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0),
 -      [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0),
 -      [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0),
 -      [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, CLK_ENABLE_ON_INIT),
 -      [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0),
 -      [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0),
 -      [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0),
 -      [DIV6_SDHI2] = SH_CLK_DIV6(&pll1_div2_clk, SD2CKCR, 0),
 -      [DIV6_FSIA] = SH_CLK_DIV6(&pll1_div2_clk, FSIACKCR, 0),
 -      [DIV6_FSIB] = SH_CLK_DIV6(&pll1_div2_clk, FSIBCKCR, 0),
 -      [DIV6_SUB] = SH_CLK_DIV6(&sh73a0_extal2_clk, SUBCKCR, 0),
 -      [DIV6_SPUA] = SH_CLK_DIV6(&pll1_div2_clk, SPUACKCR, 0),
 -      [DIV6_SPUV] = SH_CLK_DIV6(&pll1_div2_clk, SPUVCKCR, 0),
 -      [DIV6_MSU] = SH_CLK_DIV6(&pll1_div2_clk, MSUCKCR, 0),
 -      [DIV6_HSI] = SH_CLK_DIV6(&pll1_div2_clk, HSICKCR, 0),
 -      [DIV6_MFG1] = SH_CLK_DIV6(&pll1_div2_clk, MFCK1CR, 0),
 -      [DIV6_MFG2] = SH_CLK_DIV6(&pll1_div2_clk, MFCK2CR, 0),
 -      [DIV6_DSIT] = SH_CLK_DIV6(&pll1_div2_clk, DSITCKCR, 0),
 -      [DIV6_DSI0P] = SH_CLK_DIV6(&pll1_div2_clk, DSI0PCKCR, 0),
 -      [DIV6_DSI1P] = SH_CLK_DIV6(&pll1_div2_clk, DSI1PCKCR, 0),
 +      [DIV6_VCK1] = SH_CLK_DIV6_EXT(VCLKCR1, 0,
 +                      vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
 +      [DIV6_VCK2] = SH_CLK_DIV6_EXT(VCLKCR2, 0,
 +                      vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
 +      [DIV6_VCK3] = SH_CLK_DIV6_EXT(VCLKCR3, 0,
 +                      vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
-       [DIV6_ZB1] = SH_CLK_DIV6_EXT(ZBCKCR, 0,
++      [DIV6_ZB1] = SH_CLK_DIV6_EXT(ZBCKCR, CLK_ENABLE_ON_INIT,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
 +      [DIV6_FLCTL] = SH_CLK_DIV6_EXT(FLCKCR, 0,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
 +      [DIV6_SDHI0] = SH_CLK_DIV6_EXT(SD0CKCR, 0,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 6, 2),
 +      [DIV6_SDHI1] = SH_CLK_DIV6_EXT(SD1CKCR, 0,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 6, 2),
 +      [DIV6_SDHI2] = SH_CLK_DIV6_EXT(SD2CKCR, 0,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 6, 2),
 +      [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 6, 1),
 +      [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 6, 1),
 +      [DIV6_SUB] = SH_CLK_DIV6_EXT(SUBCKCR, 0,
 +                      pll_extal2_parent, ARRAY_SIZE(pll_extal2_parent), 6, 2),
 +      [DIV6_SPUA] = SH_CLK_DIV6_EXT(SPUACKCR, 0,
 +                      pll_extal2_parent, ARRAY_SIZE(pll_extal2_parent), 6, 2),
 +      [DIV6_SPUV] = SH_CLK_DIV6_EXT(SPUVCKCR, 0,
 +                      pll_extal2_parent, ARRAY_SIZE(pll_extal2_parent), 6, 2),
 +      [DIV6_MSU] = SH_CLK_DIV6_EXT(MSUCKCR, 0,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
 +      [DIV6_HSI] = SH_CLK_DIV6_EXT(HSICKCR, 0,
 +                      hsi_parent, ARRAY_SIZE(hsi_parent), 6, 2),
 +      [DIV6_MFG1] = SH_CLK_DIV6_EXT(MFCK1CR, 0,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
 +      [DIV6_MFG2] = SH_CLK_DIV6_EXT(MFCK2CR, 0,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
 +      [DIV6_DSIT] = SH_CLK_DIV6_EXT(DSITCKCR, 0,
 +                      pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
 +      [DIV6_DSI0P] = SH_CLK_DIV6_EXT(DSI0PCKCR, 0,
 +                      dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
 +      [DIV6_DSI1P] = SH_CLK_DIV6_EXT(DSI1PCKCR, 0,
 +                      dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
  };
  
  enum { MSTP001,

diff --cc arch/arm/mach-shmobile/include/mach/common.h
Simple merge