bnx2x: Add and correct PCI link speed prints
authorDmitry Kravkov <dmitry@broadcom.com>
Mon, 27 May 2013 04:08:27 +0000 (04:08 +0000)
committerDavid S. Miller <davem@davemloft.net>
Tue, 28 May 2013 04:41:49 +0000 (21:41 -0700)
This adds the print of the PCI gen3 link speed (8GHz), as well as correcting
the same print for 57712 boards (the print erroneously showed a 2.5GHz speed).

Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Ariel Elior <ariele@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

index 946450d6d9886128ee014a92a0c8b5dc137075fe..47b06fc22b972f0d321914d28910afa5ba1b119a 100644 (file)
@@ -2342,4 +2342,9 @@ enum {
 
 #define NUM_MACS       8
 
+enum bnx2x_pci_bus_speed {
+       BNX2X_PCI_LINK_SPEED_2500 = 2500,
+       BNX2X_PCI_LINK_SPEED_5000 = 5000,
+       BNX2X_PCI_LINK_SPEED_8000 = 8000
+};
 #endif /* bnx2x.h */
index 80982c38ae69d8e4ce6043095fc96e79d76877c1..04fa5105ca52750c6285624453fde466ee9aa183 100644 (file)
@@ -12111,15 +12111,26 @@ err_out:
        return rc;
 }
 
-static void bnx2x_get_pcie_width_speed(struct bnx2x *bp, int *width, int *speed)
+static void bnx2x_get_pcie_width_speed(struct bnx2x *bp, int *width,
+                                      enum bnx2x_pci_bus_speed *speed)
 {
-       u32 val = 0;
+       u32 link_speed, val = 0;
 
        pci_read_config_dword(bp->pdev, PCICFG_LINK_CONTROL, &val);
        *width = (val & PCICFG_LINK_WIDTH) >> PCICFG_LINK_WIDTH_SHIFT;
 
-       /* return value of 1=2.5GHz 2=5GHz */
-       *speed = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT;
+       link_speed = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT;
+
+       switch (link_speed) {
+       case 3:
+               *speed = BNX2X_PCI_LINK_SPEED_8000;
+               break;
+       case 2:
+               *speed = BNX2X_PCI_LINK_SPEED_5000;
+               break;
+       default:
+               *speed = BNX2X_PCI_LINK_SPEED_2500;
+       }
 }
 
 static int bnx2x_check_firmware(struct bnx2x *bp)
@@ -12482,7 +12493,8 @@ static int bnx2x_init_one(struct pci_dev *pdev,
 {
        struct net_device *dev = NULL;
        struct bnx2x *bp;
-       int pcie_width, pcie_speed;
+       int pcie_width;
+       enum bnx2x_pci_bus_speed pcie_speed;
        int rc, max_non_def_sbs;
        int rx_count, tx_count, rss_count, doorbell_size;
        int max_cos_est;
@@ -12634,15 +12646,15 @@ static int bnx2x_init_one(struct pci_dev *pdev,
        BNX2X_DEV_INFO("got pcie width %d and speed %d\n",
                       pcie_width, pcie_speed);
 
-       BNX2X_DEV_INFO(
-               "%s (%c%d) PCI-E x%d %s found at mem %lx, IRQ %d, node addr %pM\n",
-                   board_info[ent->driver_data].name,
-                   (CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4),
-                   pcie_width,
-                   ((!CHIP_IS_E2(bp) && pcie_speed == 2) ||
-                    (CHIP_IS_E2(bp) && pcie_speed == 1)) ?
-                   "5GHz (Gen2)" : "2.5GHz",
-                   dev->base_addr, bp->pdev->irq, dev->dev_addr);
+       BNX2X_DEV_INFO("%s (%c%d) PCI-E x%d %s found at mem %lx, IRQ %d, node addr %pM\n",
+                      board_info[ent->driver_data].name,
+                      (CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4),
+                      pcie_width,
+                      pcie_speed == BNX2X_PCI_LINK_SPEED_2500 ? "2.5GHz" :
+                      pcie_speed == BNX2X_PCI_LINK_SPEED_5000 ? "5.0GHz" :
+                      pcie_speed == BNX2X_PCI_LINK_SPEED_8000 ? "8.0GHz" :
+                      "Unknown",
+                      dev->base_addr, bp->pdev->irq, dev->dev_addr);
 
        return 0;