ARM: S5P64X0: Add GPIO setup for LCD
authorAjay Kumar <ajaykumar.rs@samsung.com>
Mon, 26 Sep 2011 22:46:57 +0000 (07:46 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Tue, 4 Oct 2011 10:00:53 +0000 (19:00 +0900)
This patch adds GPIO lines settings(HSYNC, VSYNC, VCLK and VD) for LCD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-s5p64x0/Kconfig
arch/arm/mach-s5p64x0/Makefile
arch/arm/mach-s5p64x0/setup-fb-24bpp.c [new file with mode: 0644]
arch/arm/plat-samsung/include/plat/fb.h

index 9527ed24dbff92f3c6d004db95c85c7613efea49..92b06024ee9fe458115d0faab26cf0ce1219a8e9 100644 (file)
@@ -21,6 +21,12 @@ config CPU_S5P6450
        help
          Enable S5P6450 CPU support
 
+config S5P64X0_SETUP_FB_24BPP
+       bool
+       help
+         Common setup code for S5P64X0 based boards with a LCD display
+         through RGB interface.
+
 config S5P64X0_SETUP_I2C1
        bool
        help
index 5b94955388396a6cc60d92dbffa14b8e86f04432..eb7468012a37452230762d840b9b66c5adf8136d 100644 (file)
@@ -28,3 +28,4 @@ obj-y                         += dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)  += dev-spi.o
 
 obj-$(CONFIG_S5P64X0_SETUP_I2C1)       += setup-i2c1.o
+obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP)   += setup-fb-24bpp.o
diff --git a/arch/arm/mach-s5p64x0/setup-fb-24bpp.c b/arch/arm/mach-s5p64x0/setup-fb-24bpp.c
new file mode 100644 (file)
index 0000000..f346ee4
--- /dev/null
@@ -0,0 +1,29 @@
+/* linux/arch/arm/mach-s5p64x0/setup-fb-24bpp.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com/
+ *
+ * Base S5P64X0 GPIO setup information for LCD framebuffer
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/fb.h>
+#include <linux/gpio.h>
+
+#include <plat/cpu.h>
+#include <plat/fb.h>
+#include <plat/gpio-cfg.h>
+
+void s5p64x0_fb_gpio_setup_24bpp(void)
+{
+       if (soc_is_s5p6440()) {
+               s3c_gpio_cfgrange_nopull(S5P6440_GPI(0), 16, S3C_GPIO_SFN(2));
+               s3c_gpio_cfgrange_nopull(S5P6440_GPJ(0), 12, S3C_GPIO_SFN(2));
+       } else if (soc_is_s5p6450()) {
+               s3c_gpio_cfgrange_nopull(S5P6450_GPI(0), 16, S3C_GPIO_SFN(2));
+               s3c_gpio_cfgrange_nopull(S5P6450_GPJ(0), 12, S3C_GPIO_SFN(2));
+       }
+}
index 01f10e4d00c71e5f799140bffbeaba650b212592..0fedf47fa502482a117dc9427d5067d11d8e3a3d 100644 (file)
@@ -109,4 +109,11 @@ extern void s5pv210_fb_gpio_setup_24bpp(void);
  */
 extern void exynos4_fimd0_gpio_setup_24bpp(void);
 
+/**
+ * s5p64x0_fb_gpio_setup_24bpp() - S5P6440/S5P6450 setup function for 24bpp LCD
+ *
+ * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
+ */
+extern void s5p64x0_fb_gpio_setup_24bpp(void);
+
 #endif /* __PLAT_S3C_FB_H */