{
ide_hwif_t *hwif;
void __iomem *base;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
- hw_regs_t hw;
base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
if (!base)
if (!hwif)
return -ENODEV;
- ide_init_port_hw(hwif, &hw);
default_hwif_mmiops(hwif);
state->hwif[0] = hwif;
idx[0] = hwif->index;
- ide_device_add(idx, NULL);
+ ide_device_add(idx, NULL, hws);
return 0;
}
void __iomem *ioc_base, *easi_base;
unsigned int sel = 0;
int ret;
+ hw_regs_t hw[2], *hws[] = { &hw[0], NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
struct ide_port_info d = icside_v6_port_info;
- hw_regs_t hw[2];
ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
if (!ioc_base) {
if (hwif == NULL)
return -ENODEV;
- ide_init_port_hw(hwif, &hw[0]);
+ hwif->chipset = ide_acorn;
default_hwif_mmiops(hwif);
idx[0] = hwif->index;
mate = ide_find_port();
if (mate) {
- ide_init_port_hw(mate, &hw[1]);
default_hwif_mmiops(mate);
+ hws[1] = &hw[1];
idx[1] = mate->index;
}
d.dma_ops = NULL;
}
- ide_device_add(idx, &d);
+ ide_device_add(idx, &d, hws);
return 0;
static int __init ide_arm_init(void)
{
ide_hwif_t *hwif;
- hw_regs_t hw;
unsigned long base = IDE_ARM_IO, ctl = IDE_ARM_IO + 0x206;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
if (!request_region(base, 8, DRV_NAME)) {
hwif = ide_find_port();
if (hwif) {
- ide_init_port_hw(hwif, &hw);
idx[0] = hwif->index;
- ide_device_add(idx, NULL);
+ ide_device_add(idx, NULL, hws);
}
return 0;
ide_hwif_t *hwif;
unsigned long base, rate;
int i;
- hw_regs_t hw;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
clk = clk_get(NULL, "IDECLK");
i = hwif->index;
- ide_init_port_hw(hwif, &hw);
-
default_hwif_mmiops(hwif);
idx[0] = i;
- ide_device_add(idx, &palm_bk3710_port_info);
+ ide_device_add(idx, &palm_bk3710_port_info, hws);
return 0;
out:
ide_hwif_t *hwif;
void __iomem *base;
int ret;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
- hw_regs_t hw;
ret = ecard_request_resources(ec);
if (ret)
goto release;
}
- ide_init_port_hw(hwif, &hw);
default_hwif_mmiops(hwif);
idx[0] = hwif->index;
- ide_device_add(idx, &rapide_port_info);
+ ide_device_add(idx, &rapide_port_info, hws);
ecard_set_drvdata(ec, hwif);
goto out;
static int __init h8300_ide_init(void)
{
- hw_regs_t hw;
ide_hwif_t *hwif;
int index;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
printk(KERN_INFO DRV_NAME ": H8/300 generic IDE interface\n");
return -ENOENT;
index = hwif->index;
- ide_init_port_hw(hwif, &hw);
hwif_setup(hwif);
idx[0] = index;
- ide_device_add(idx, &h8300_port_info);
+ ide_device_add(idx, &h8300_port_info, hws);
return 0;
ide_hwif_t *hwif;
unsigned int base, ctl;
int irq;
- hw_regs_t hw;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[] = { 0xff, 0xff, 0xff, 0xff };
if (sscanf(buf, "%x:%x:%d", &base, &ctl, &irq) != 3)
hw.irq = irq;
hw.chipset = ide_generic;
- ide_init_port_hw(hwif, &hw);
-
idx[0] = hwif->index;
- ide_device_add(idx, NULL);
+ ide_device_add(idx, NULL, hws);
return n;
};
static int __init ide_generic_init(void)
{
+ hw_regs_t hw[MAX_HWIFS], *hws[MAX_HWIFS];
u8 idx[MAX_HWIFS];
int i;
for (i = 0; i < MAX_HWIFS; i++) {
ide_hwif_t *hwif;
unsigned long io_addr = ide_default_io_base(i);
- hw_regs_t hw;
+ hws[i] = NULL;
idx[i] = 0xff;
if ((probe_mask & (1 << i)) && io_addr) {
continue;
}
- memset(&hw, 0, sizeof(hw));
- ide_std_init_ports(&hw, io_addr, io_addr + 0x206);
- hw.irq = ide_default_irq(io_addr);
- hw.chipset = ide_generic;
- ide_init_port_hw(hwif, &hw);
+ hwif->chipset = ide_generic;
+
+ memset(&hw[i], 0, sizeof(hw[i]));
+ ide_std_init_ports(&hw[i], io_addr, io_addr + 0x206);
+ hw[i].irq = ide_default_irq(io_addr);
+ hw[i].chipset = ide_generic;
+ hws[i] = &hw[i];
idx[i] = i;
}
}
- ide_device_add_all(idx, NULL);
+ ide_device_add_all(idx, NULL, hws);
if (ide_generic_sysfs_init())
printk(KERN_ERR DRV_NAME ": failed to create ide_generic "
static int idepnp_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id)
{
- hw_regs_t hw;
ide_hwif_t *hwif;
unsigned long base, ctl;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
printk(KERN_INFO DRV_NAME ": generic PnP IDE interface\n");
u8 index = hwif->index;
u8 idx[4] = { index, 0xff, 0xff, 0xff };
- ide_init_port_hw(hwif, &hw);
-
pnp_set_drvdata(dev, hwif);
- ide_device_add(idx, NULL);
+ ide_device_add(idx, NULL, hws);
return 0;
}
}
EXPORT_SYMBOL_GPL(ide_find_port_slot);
-int ide_device_add_all(u8 *idx, const struct ide_port_info *d)
+int ide_device_add_all(u8 *idx, const struct ide_port_info *d, hw_regs_t **hws)
{
ide_hwif_t *hwif, *mate = NULL;
int i, rc = 0;
hwif = &ide_hwifs[idx[i]];
+ ide_init_port_hw(hwif, hws[i]);
ide_port_apply_params(hwif);
if (d == NULL) {
}
EXPORT_SYMBOL_GPL(ide_device_add_all);
-int ide_device_add(u8 idx[4], const struct ide_port_info *d)
+int ide_device_add(u8 *idx, const struct ide_port_info *d, hw_regs_t **hws)
{
+ hw_regs_t *hws_all[MAX_HWIFS];
u8 idx_all[MAX_HWIFS];
int i;
- for (i = 0; i < MAX_HWIFS; i++)
+ for (i = 0; i < MAX_HWIFS; i++) {
+ hws_all[i] = (i < 4) ? hws[i] : NULL;
idx_all[i] = (i < 4) ? idx[i] : 0xff;
+ }
- return ide_device_add_all(idx_all, d);
+ return ide_device_add_all(idx_all, d, hws_all);
}
EXPORT_SYMBOL_GPL(ide_device_add);
}
EXPORT_SYMBOL_GPL(ide_port_scan);
-static void ide_legacy_init_one(u8 *idx, hw_regs_t *hw, u8 port_no,
- const struct ide_port_info *d,
+static void ide_legacy_init_one(u8 *idx, hw_regs_t **hws, hw_regs_t *hw,
+ u8 port_no, const struct ide_port_info *d,
unsigned long config)
{
ide_hwif_t *hwif;
hwif = ide_find_port_slot(d);
if (hwif) {
- ide_init_port_hw(hwif, hw);
+ hwif->chipset = hw->chipset;
+
if (config)
hwif->config_data = config;
+
+ hws[port_no] = hw;
idx[port_no] = hwif->index;
}
}
int ide_legacy_device_add(const struct ide_port_info *d, unsigned long config)
{
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
- hw_regs_t hw[2];
+ hw_regs_t hw[2], *hws[] = { NULL, NULL, NULL, NULL };
memset(&hw, 0, sizeof(hw));
if ((d->host_flags & IDE_HFLAG_QD_2ND_PORT) == 0)
- ide_legacy_init_one(idx, &hw[0], 0, d, config);
- ide_legacy_init_one(idx, &hw[1], 1, d, config);
+ ide_legacy_init_one(idx, hws, &hw[0], 0, d, config);
+ ide_legacy_init_one(idx, hws, &hw[1], 1, d, config);
if (idx[0] == 0xff && idx[1] == 0xff &&
(d->host_flags & IDE_HFLAG_SINGLE))
return -ENOENT;
- ide_device_add(idx, d);
+ ide_device_add(idx, d, hws);
return 0;
}
hwif->gendev.parent = hw->parent ? hw->parent : hw->dev;
hwif->ack_intr = hw->ack_intr;
}
-EXPORT_SYMBOL_GPL(ide_init_port_hw);
/*
* Locks for IDE setting functionality
#define CATWEASEL_NUM_HWIFS 3
#define XSURF_NUM_HWIFS 2
+#define MAX_NUM_HWIFS 3
+
/*
* Bases of the IDE interfaces (relative to the board address)
*/
static int __init buddha_init(void)
{
- hw_regs_t hw;
ide_hwif_t *hwif;
int i;
while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
unsigned long board;
+ hw_regs_t hw[MAX_NUM_HWIFS], *hws[] = { NULL, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_BUDDHA) {
ack_intr = xsurf_ack_intr;
}
- buddha_setup_ports(&hw, base, ctl, irq_port, ack_intr);
+ buddha_setup_ports(&hw[i], base, ctl, irq_port,
+ ack_intr);
hwif = ide_find_port();
if (hwif) {
- u8 index = hwif->index;
-
- ide_init_port_hw(hwif, &hw);
+ hwif->chipset = ide_generic;
- idx[i] = index;
+ hws[i] = &hw[i];
+ idx[i] = hwif->index;
}
}
- ide_device_add(idx, NULL);
+ ide_device_add(idx, NULL, hws);
}
return 0;
static int __init falconide_init(void)
{
- hw_regs_t hw;
ide_hwif_t *hwif;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
if (!MACH_IS_ATARI || !ATARIHW_PRESENT(IDE))
return 0;
u8 index = hwif->index;
u8 idx[4] = { index, 0xff, 0xff, 0xff };
- ide_init_port_hw(hwif, &hw);
-
/* Atari has a byte-swapped IDE interface */
hwif->input_data = falconide_input_data;
hwif->output_data = falconide_output_data;
ide_get_lock(NULL, NULL);
- ide_device_add(idx, NULL);
+ ide_device_add(idx, NULL, hws);
ide_release_lock();
}
static int __init gayle_init(void)
{
int a4000, i;
+ hw_regs_t hw[GAYLE_NUM_HWIFS], *hws[] = { NULL, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
if (!MACH_IS_AMIGA)
for (i = 0; i < GAYLE_NUM_PROBE_HWIFS; i++) {
unsigned long base, ctrlport, irqport;
ide_ack_intr_t *ack_intr;
- hw_regs_t hw;
ide_hwif_t *hwif;
unsigned long phys_base, res_start, res_n;
base = (unsigned long)ZTWO_VADDR(phys_base);
ctrlport = GAYLE_HAS_CONTROL_REG ? (base + GAYLE_CONTROL) : 0;
- gayle_setup_ports(&hw, base, ctrlport, irqport, ack_intr);
+ gayle_setup_ports(&hw[i], base, ctrlport, irqport, ack_intr);
hwif = ide_find_port();
if (hwif) {
- u8 index = hwif->index;
+ hwif->chipset = ide_generic;
- ide_init_port_hw(hwif, &hw);
-
- idx[i] = index;
+ hws[i] = &hw[i];
+ idx[i] = hwif->index;
} else
release_mem_region(res_start, res_n);
}
- ide_device_add(idx, NULL);
+ ide_device_add(idx, NULL, hws);
return 0;
}
{
ide_hwif_t *hwif, *mate;
unsigned long base = 0x1f0, ctl = 0x3f6;
+ hw_regs_t hw, *hws[] = { NULL, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
- hw_regs_t hw;
if (probe_4drives == 0)
return -ENODEV;
hwif = ide_find_port();
if (hwif) {
- ide_init_port_hw(hwif, &hw);
+ hwif->chipset = ide_4drives;
+
+ hws[0] = &hw;
idx[0] = hwif->index;
}
mate = ide_find_port();
if (mate) {
- ide_init_port_hw(mate, &hw);
+ hws[1] = &hw;
idx[1] = mate->index;
}
- ide_device_add(idx, &ide_4drives_port_info);
+ ide_device_add(idx, &ide_4drives_port_info, hws);
return 0;
}
unsigned long irq, struct pcmcia_device *handle)
{
ide_hwif_t *hwif;
- hw_regs_t hw;
int i;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
if (!request_region(io, 8, DRV_NAME)) {
if (hwif == NULL)
goto out_release;
- i = hwif->index;
+ idx[0] = hwif->index;
- ide_init_port_hw(hwif, &hw);
-
- idx[0] = i;
-
- ide_device_add(idx, &idecs_port_info);
+ ide_device_add(idx, &idecs_port_info, hws);
if (hwif->present)
return hwif;
void __iomem *base, *alt_base;
ide_hwif_t *hwif;
struct pata_platform_info *pdata;
+ int ret = 0, mmio = 0;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
- int ret = 0;
- int mmio = 0;
- hw_regs_t hw;
struct ide_port_info d = platform_ide_port_info;
pdata = pdev->dev.platform_data;
plat_ide_setup_ports(&hw, base, alt_base, pdata, res_irq->start);
hw.dev = &pdev->dev;
- ide_init_port_hw(hwif, &hw);
-
if (mmio) {
d.host_flags |= IDE_HFLAG_MMIO;
default_hwif_mmiops(hwif);
idx[0] = hwif->index;
- ide_device_add(idx, &d);
+ ide_device_add(idx, &d, hws);
platform_set_drvdata(pdev, hwif);
ide_ack_intr_t *ack_intr;
unsigned long base;
int irq;
- hw_regs_t hw;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
if (!MACH_IS_MAC)
return -ENODEV;
u8 index = hwif->index;
u8 idx[4] = { index, 0xff, 0xff, 0xff };
- ide_init_port_hw(hwif, &hw);
-
- ide_device_add(idx, NULL);
+ ide_device_add(idx, NULL, hws);
}
return 0;
{
int i;
ide_hwif_t *hwif;
- const char *name;
+ hw_regs_t hw[Q40IDE_NUM_HWIFS], *hws[] = { NULL, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
if (!MACH_IS_Q40)
printk(KERN_INFO "ide: Q40 IDE controller\n");
for (i = 0; i < Q40IDE_NUM_HWIFS; i++) {
- hw_regs_t hw;
+ const char *name = q40_ide_names[i];
- name = q40_ide_names[i];
if (!request_region(pcide_bases[i], 8, name)) {
printk("could not reserve ports %lx-%lx for %s\n",
pcide_bases[i],pcide_bases[i]+8,name);
release_region(pcide_bases[i], 8);
continue;
}
- q40_ide_setup_ports(&hw, pcide_bases[i],
- NULL,
-// m68kide_iops,
+ q40_ide_setup_ports(&hw[i], pcide_bases[i], NULL,
q40ide_default_irq(pcide_bases[i]));
hwif = ide_find_port();
if (hwif) {
- ide_init_port_hw(hwif, &hw);
+ hwif->chipset = ide_generic;
/* Q40 has a byte-swapped IDE interface */
hwif->input_data = q40ide_input_data;
hwif->output_data = q40ide_output_data;
+ hws[i] = &hw[i];
idx[i] = hwif->index;
}
}
- ide_device_add(idx, NULL);
+ ide_device_add(idx, NULL, hws);
return 0;
}
ide_hwif_t *hwif;
struct resource *res;
int ret = 0;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
- hw_regs_t hw;
#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA)
char *mode = "MWDMA2";
hw.dev = dev;
hw.chipset = ide_au1xxx;
- ide_init_port_hw(hwif, &hw);
-
/* If the user has selected DDMA assisted copies,
then set up a few local I/O function entry points
*/
idx[0] = hwif->index;
- ide_device_add(idx, &au1xxx_port_info);
+ ide_device_add(idx, &au1xxx_port_info, hws);
dev_set_drvdata(dev, hwif);
ide_hwif_t *hwif;
u8 __iomem *base;
phys_t offset, size;
- hw_regs_t hw;
int i;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[] = { 0xff, 0xff, 0xff, 0xff };
if (!SIBYTE_HAVE_IDE)
if (hwif == NULL)
goto err;
- ide_init_port_hw(hwif, &hw);
-
/* Setup MMIO ops. */
default_hwif_mmiops(hwif);
idx[0] = hwif->index;
- ide_device_add(idx, &swarm_port_info);
+ ide_device_add(idx, &swarm_port_info, hws);
dev_set_drvdata(dev, hwif);
int second_port_cmd640 = 0, rc;
const char *bus_type, *port2;
u8 b, cfr;
+ hw_regs_t hw[2], *hws[] = { NULL, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
- hw_regs_t hw[2];
if (cmd640_vlb && probe_for_cmd640_vlb()) {
bus_type = "VLB";
* Initialize data for primary port
*/
if (cmd_hwif0) {
- ide_init_port_hw(cmd_hwif0, &hw[0]);
+ cmd_hwif0->chipset = ide_cmd640;
+
+ hws[0] = &hw[0];
idx[0] = cmd_hwif0->index;
}
if (second_port_cmd640) {
cmd_hwif1 = ide_find_port();
if (cmd_hwif1) {
- ide_init_port_hw(cmd_hwif1, &hw[1]);
+ hws[1] = &hw[1];
idx[1] = cmd_hwif1->index;
}
}
cmd640_dump_regs();
#endif
- ide_device_add(idx, &cmd640_port_info);
+ ide_device_add(idx, &cmd640_port_info, hws);
return 1;
}
static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
const struct ide_port_info *d = &cyrix_chipsets[id->driver_data];
+ hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
ide_setup_pci_noise(dev, d);
* do all the device setup for us
*/
- ide_pci_setup_ports(dev, d, 14, &idx[0]);
+ ide_pci_setup_ports(dev, d, 14, &idx[0], &hw[0], &hws[0]);
- ide_device_add(idx, d);
+ ide_device_add(idx, d, hws);
return 0;
}
delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
{
unsigned long base;
- hw_regs_t hw;
ide_hwif_t *hwif = NULL;
int i, rc;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
rc = pci_enable_device(dev);
i = hwif->index;
- ide_init_port_hw(hwif, &hw);
-
idx[0] = i;
- ide_device_add(idx, &delkin_cb_port_info);
+ ide_device_add(idx, &delkin_cb_port_info, hws);
pci_set_drvdata(dev, hwif);
{
struct scc_ports *ports = pci_get_drvdata(dev);
ide_hwif_t *hwif = NULL;
- hw_regs_t hw;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
int i;
hw.irq = dev->irq;
hw.dev = &dev->dev;
hw.chipset = ide_pci;
- ide_init_port_hw(hwif, &hw);
idx[0] = hwif->index;
- ide_device_add(idx, d);
+ ide_device_add(idx, d, hws);
return 0;
}
unsigned long bar0, cmd_phys_base, ctl;
void __iomem *virt_base;
ide_hwif_t *hwif;
+ hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
- hw_regs_t hw;
struct ide_port_info d = sgiioc4_port_info;
/* Get the CmdBlk and CtrlBlk Base Registers */
if (hwif == NULL)
goto err;
- ide_init_port_hw(hwif, &hw);
-
/* The IOC4 uses MMIO rather than Port IO. */
default_hwif_mmiops(hwif);
idx[0] = hwif->index;
- if (ide_device_add(idx, &d))
+ if (ide_device_add(idx, &d, hws))
return -EIO;
return 0;
struct device_node *np = pmif->node;
const int *bidp;
ide_hwif_t *hwif;
+ hw_regs_t *hws[] = { hw, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
struct ide_port_info d = pmac_port_info;
default_hwif_mmiops(hwif);
hwif->OUTBSYNC = pmac_outbsync;
- ide_init_port_hw(hwif, hw);
-
idx[0] = hwif->index;
- ide_device_add(idx, &d);
+ ide_device_add(idx, &d, hws);
return 0;
}
* @d: IDE port info
* @port: port number
* @irq: PCI IRQ
+ * @hw: hw_regs_t instance corresponding to this port
*
* Perform the initial set up for the hardware interface structure. This
* is done per interface port rather than per PCI device. There may be
static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev,
const struct ide_port_info *d,
- unsigned int port, int irq)
+ unsigned int port, int irq,
+ hw_regs_t *hw)
{
unsigned long ctl = 0, base = 0;
ide_hwif_t *hwif;
- struct hw_regs_s hw;
if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
if (ide_pci_check_iomem(dev, d, 2 * port) ||
return NULL;
}
+ memset(hw, 0, sizeof(*hw));
+ hw->irq = irq;
+ hw->dev = &dev->dev;
+ hw->chipset = d->chipset ? d->chipset : ide_pci;
+ ide_std_init_ports(hw, base, ctl | 2);
+
hwif = ide_find_port_slot(d);
if (hwif == NULL)
return NULL;
- memset(&hw, 0, sizeof(hw));
- hw.irq = irq;
- hw.dev = &dev->dev;
- hw.chipset = d->chipset ? d->chipset : ide_pci;
- ide_std_init_ports(&hw, base, ctl | 2);
-
- ide_init_port_hw(hwif, &hw);
+ hwif->chipset = hw->chipset;
return hwif;
}
* @d: IDE port info
* @pciirq: IRQ line
* @idx: ATA index table to update
+ * @hw: hw_regs_t instances corresponding to this PCI IDE device
+ * @hws: hw_regs_t pointers table to update
*
* Scan the interfaces attached to this device and do any
* necessary per port setup. Attach the devices and ask the
* where the chipset setup is not the default PCI IDE one.
*/
-void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx)
+void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d,
+ int pciirq, u8 *idx, hw_regs_t *hw, hw_regs_t **hws)
{
int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
ide_hwif_t *hwif;
continue; /* port not enabled */
}
- hwif = ide_hwif_configure(dev, d, port, pciirq);
+ hwif = ide_hwif_configure(dev, d, port, pciirq, hw + port);
if (hwif == NULL)
continue;
+ *(hws + port) = hw + port;
*(idx + port) = hwif->index;
}
}
int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
{
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
+ hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
int ret;
ret = do_ide_setup_pci_device(dev, d, 1);
if (ret >= 0) {
/* FIXME: silent failure can happen */
- ide_pci_setup_ports(dev, d, ret, &idx[0]);
+ ide_pci_setup_ports(dev, d, ret, &idx[0], &hw[0], &hws[0]);
- ide_device_add(idx, d);
+ ide_device_add(idx, d, hws);
}
return ret;
{
struct pci_dev *pdev[] = { dev1, dev2 };
int ret, i;
+ hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
for (i = 0; i < 2; i++) {
goto out;
/* FIXME: silent failure can happen */
- ide_pci_setup_ports(pdev[i], d, ret, &idx[i*2]);
+ ide_pci_setup_ports(pdev[i], d, ret, &idx[i*2], &hw[i*2],
+ &hws[i*2]);
}
- ide_device_add(idx, d);
+ ide_device_add(idx, d, hws);
out:
return ret;
}
#define ide_pci_register_driver(d) pci_register_driver(d)
#endif
-void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
+void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int,
+ u8 *, hw_regs_t *, hw_regs_t **);
void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
void ide_port_apply_params(ide_hwif_t *);
-int ide_device_add_all(u8 *idx, const struct ide_port_info *);
-int ide_device_add(u8 idx[4], const struct ide_port_info *);
+int ide_device_add_all(u8 *, const struct ide_port_info *, hw_regs_t **);
+int ide_device_add(u8 *, const struct ide_port_info *, hw_regs_t **);
int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
void ide_port_unregister_devices(ide_hwif_t *);
void ide_port_scan(ide_hwif_t *);