b43: N-PHY: set band on every channel switch
authorRafał Miłecki <zajec5@gmail.com>
Thu, 17 Jul 2014 17:31:04 +0000 (19:31 +0200)
committerJohn W. Linville <linville@tuxdriver.com>
Fri, 18 Jul 2014 17:45:25 +0000 (13:45 -0400)
Seems to be required by some hardware, wl does it every time.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/b43/phy_n.c
drivers/net/wireless/b43/phy_n.h

index 2c5583231d2fbd0b22906b467331b11d451be48e..ef1acaec7027c864e978e65487e8a53a40fa9dc3 100644 (file)
@@ -6058,23 +6058,23 @@ static void b43_nphy_channel_setup(struct b43_wldev *dev,
        struct b43_phy *phy = &dev->phy;
        struct b43_phy_n *nphy = dev->phy.n;
        int ch = new_channel->hw_value;
-
-       u16 old_band_5ghz;
        u16 tmp16;
 
-       old_band_5ghz =
-               b43_phy_read(dev, B43_NPHY_BANDCTL) & B43_NPHY_BANDCTL_5GHZ;
-       if (new_channel->band == IEEE80211_BAND_5GHZ && !old_band_5ghz) {
+       if (new_channel->band == IEEE80211_BAND_5GHZ) {
                tmp16 = b43_read16(dev, B43_MMIO_PSM_PHY_HDR);
                b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16 | 4);
-               b43_phy_set(dev, B43_PHY_B_BBCFG, 0xC000);
+               /* Put BPHY in the reset */
+               b43_phy_set(dev, B43_PHY_B_BBCFG,
+                           B43_PHY_B_BBCFG_RSTCCA | B43_PHY_B_BBCFG_RSTRX);
                b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16);
                b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ);
-       } else if (new_channel->band == IEEE80211_BAND_2GHZ && old_band_5ghz) {
+       } else if (new_channel->band == IEEE80211_BAND_2GHZ) {
                b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ);
                tmp16 = b43_read16(dev, B43_MMIO_PSM_PHY_HDR);
                b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16 | 4);
-               b43_phy_mask(dev, B43_PHY_B_BBCFG, 0x3FFF);
+               /* Take BPHY out of the reset */
+               b43_phy_mask(dev, B43_PHY_B_BBCFG,
+                            (u16)~(B43_PHY_B_BBCFG_RSTCCA | B43_PHY_B_BBCFG_RSTRX));
                b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16);
        }
 
index 474bf758295d61db19fb1f1b630a58fb7f729f14..30bec815b969651ee4ad1cca2c6c74e607cc834f 100644 (file)
 #define B43_NPHY_REV7_RF_CTL_OVER6             B43_PHY_N(0x347)
 
 #define B43_PHY_B_BBCFG                                B43_PHY_N_BMODE(0x001) /* BB config */
+#define  B43_PHY_B_BBCFG_RSTCCA                        0x4000 /* Reset CCA */
+#define  B43_PHY_B_BBCFG_RSTRX                 0x8000 /* Reset RX */
 #define B43_PHY_B_TEST                         B43_PHY_N_BMODE(0x00A)
 
 struct b43_wldev;