arm64: Add helpers for detecting AArch32 support at EL0
authorSuzuki K Poulose <suzuki.poulose@arm.com>
Mon, 18 Apr 2016 09:28:34 +0000 (10:28 +0100)
committerWill Deacon <will.deacon@arm.com>
Wed, 20 Apr 2016 11:22:42 +0000 (12:22 +0100)
Adds a helper to extract the support for AArch32 at EL0

Tested-by: Yury Norov <ynorov@caviumnetworks.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/cpufeature.h
arch/arm64/include/asm/sysreg.h

index b9b649422fca22f9f333ee4bc11b0addd24dc59c..7f64285e4ef70f45aaef90cc83ff4400bb05d421 100644 (file)
@@ -170,6 +170,13 @@ static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
                cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
 }
 
+static inline bool id_aa64pfr0_32bit_el0(u64 pfr0)
+{
+       u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL0_SHIFT);
+
+       return val == ID_AA64PFR0_EL0_32BIT_64BIT;
+}
+
 void __init setup_cpu_features(void);
 
 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
index 19182ef18f8f05a537f64d00939954922ffd4ab3..d39d4343318a8e0269a4c18d0d23af2770a8a2df 100644 (file)
 #define ID_AA64PFR0_ASIMD_SUPPORTED    0x0
 #define ID_AA64PFR0_EL1_64BIT_ONLY     0x1
 #define ID_AA64PFR0_EL0_64BIT_ONLY     0x1
+#define ID_AA64PFR0_EL0_32BIT_64BIT    0x2
 
 /* id_aa64mmfr0 */
 #define ID_AA64MMFR0_TGRAN4_SHIFT      28