static void gpio_rcar_irq_disable(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
- struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
- gpio_chip);
+ struct gpio_rcar_priv *p = gpiochip_get_data(gc);
gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d)));
}
static void gpio_rcar_irq_enable(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
- struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
- gpio_chip);
+ struct gpio_rcar_priv *p = gpiochip_get_data(gc);
gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d)));
}
static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
- struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
- gpio_chip);
+ struct gpio_rcar_priv *p = gpiochip_get_data(gc);
unsigned int hwirq = irqd_to_hwirq(d);
dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type);
static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
- struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
- gpio_chip);
+ struct gpio_rcar_priv *p = gpiochip_get_data(gc);
int error;
if (p->irq_parent) {
return irqs_handled ? IRQ_HANDLED : IRQ_NONE;
}
-static inline struct gpio_rcar_priv *gpio_to_priv(struct gpio_chip *chip)
-{
- return container_of(chip, struct gpio_rcar_priv, gpio_chip);
-}
-
static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip,
unsigned int gpio,
bool output)
{
- struct gpio_rcar_priv *p = gpio_to_priv(chip);
+ struct gpio_rcar_priv *p = gpiochip_get_data(chip);
unsigned long flags;
/* follow steps in the GPIO documentation for
static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
{
- struct gpio_rcar_priv *p = gpio_to_priv(chip);
+ struct gpio_rcar_priv *p = gpiochip_get_data(chip);
int error;
error = pm_runtime_get_sync(&p->pdev->dev);
static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
{
- struct gpio_rcar_priv *p = gpio_to_priv(chip);
+ struct gpio_rcar_priv *p = gpiochip_get_data(chip);
pinctrl_free_gpio(chip->base + offset);
/* testing on r8a7790 shows that INDT does not show correct pin state
* when configured as output, so use OUTDT in case of output pins */
- if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit)
- return !!(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit);
+ if (gpio_rcar_read(gpiochip_get_data(chip), INOUTSEL) & bit)
+ return !!(gpio_rcar_read(gpiochip_get_data(chip), OUTDT) & bit);
else
- return !!(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit);
+ return !!(gpio_rcar_read(gpiochip_get_data(chip), INDT) & bit);
}
static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
{
- struct gpio_rcar_priv *p = gpio_to_priv(chip);
+ struct gpio_rcar_priv *p = gpiochip_get_data(chip);
unsigned long flags;
spin_lock_irqsave(&p->lock, flags);
irq_chip->irq_set_wake = gpio_rcar_irq_set_wake;
irq_chip->flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND;
- ret = gpiochip_add(gpio_chip);
+ ret = gpiochip_add_data(gpio_chip, p);
if (ret) {
dev_err(dev, "failed to add GPIO controller\n");
goto err0;