drm/amdgpu: allow userspace to read more debug registers
authorMarek Olšák <marek.olsak@amd.com>
Sat, 11 Jul 2015 10:08:46 +0000 (12:08 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 17 Aug 2015 20:50:20 +0000 (16:50 -0400)
Feel free to suggest more.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
drivers/gpu/drm/amd/amdgpu/vi.c

index 68552da4028740167ddb20289c274bc332935172..0f4a4f438f5e310d608d964d3b74e68ed8c93057 100644 (file)
@@ -362,6 +362,26 @@ static struct amdgpu_allowed_register_entry cz_allowed_read_registers[] = {
 
 static struct amdgpu_allowed_register_entry vi_allowed_read_registers[] = {
        {mmGRBM_STATUS, false},
+       {mmGRBM_STATUS2, false},
+       {mmGRBM_STATUS_SE0, false},
+       {mmGRBM_STATUS_SE1, false},
+       {mmGRBM_STATUS_SE2, false},
+       {mmGRBM_STATUS_SE3, false},
+       {mmSRBM_STATUS, false},
+       {mmSRBM_STATUS2, false},
+       {mmSRBM_STATUS3, false},
+       {mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET, false},
+       {mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET, false},
+       {mmCP_STAT, false},
+       {mmCP_STALLED_STAT1, false},
+       {mmCP_STALLED_STAT2, false},
+       {mmCP_STALLED_STAT3, false},
+       {mmCP_CPF_BUSY_STAT, false},
+       {mmCP_CPF_STALLED_STAT1, false},
+       {mmCP_CPF_STATUS, false},
+       {mmCP_CPC_BUSY_STAT, false},
+       {mmCP_CPC_STALLED_STAT1, false},
+       {mmCP_CPC_STATUS, false},
        {mmGB_ADDR_CONFIG, false},
        {mmMC_ARB_RAMCFG, false},
        {mmGB_TILE_MODE0, false},