[PATCH] ppc32: Fix PPC440SP SRAM controller DCRs
authorMatt Porter <mporter@kernel.crashing.org>
Thu, 18 Aug 2005 18:24:26 +0000 (11:24 -0700)
committerLinus Torvalds <torvalds@g5.osdl.org>
Thu, 18 Aug 2005 19:53:58 +0000 (12:53 -0700)
Fixes the incorrect DCR base value for the 440SP SRAM controller.

Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
include/asm-ppc/ibm44x.h

index 21e41c9b7267e42ea25232ebd58c93daf3f01954..e5374be86aefb90a39e608ef09ed002eab7decfe 100644 (file)
 #define MQ0_CONFIG_SIZE_2G             0x0000c000
 
 /* Internal SRAM Controller 440GX/440SP */
-#ifdef CONFIG_440SP
-#define DCRN_SRAM0_BASE                0x100
-#else /* 440GX */
 #define DCRN_SRAM0_BASE                0x000
-#endif
 
 #define DCRN_SRAM0_SB0CR       (DCRN_SRAM0_BASE + 0x020)
 #define DCRN_SRAM0_SB1CR       (DCRN_SRAM0_BASE + 0x021)