drm/i915: don't save/restore HWS_PGA reg for kms
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 17 Oct 2012 09:32:57 +0000 (11:32 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 17 Oct 2012 20:38:34 +0000 (22:38 +0200)
We already do that as part of the ringbuffer re-setup at resume time.
Furthermore the register offset has moved on gen6+ around quite a bit,
and on ilk/gm45 we also need to restore the HWS reg for the bsd ring,
not just the render ring.

So again in kms mode this is only confusing a best, hence don't
bother.

v2: Fixup logic, noticed by Paulo Zanoni.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_suspend.c

index 6bd06b72b1dc00636526be19e9a8c2a966905a36..4f50d826475359398237ec1b323d1e3c8293c6e2 100644 (file)
@@ -814,7 +814,8 @@ int i915_save_state(struct drm_device *dev)
        mutex_lock(&dev->struct_mutex);
 
        /* Hardware status page */
-       dev_priv->saveHWS = I915_READ(HWS_PGA);
+       if (!drm_core_check_feature(dev, DRIVER_MODESET))
+               dev_priv->saveHWS = I915_READ(HWS_PGA);
 
        i915_save_display(dev);
 
@@ -867,7 +868,8 @@ int i915_restore_state(struct drm_device *dev)
        mutex_lock(&dev->struct_mutex);
 
        /* Hardware status page */
-       I915_WRITE(HWS_PGA, dev_priv->saveHWS);
+       if (!drm_core_check_feature(dev, DRIVER_MODESET))
+               I915_WRITE(HWS_PGA, dev_priv->saveHWS);
 
        i915_restore_display(dev);