stmmac: prevent dma init stuck in case of failures.

Add a limit when perform the DMA reset procedure
so, in case of problems (i.e. PHY reset failed) the
Kernel won't hang on the stmmac DMA initialisation
blocking the Kernels execution.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/stmmac/dwmac1000_dma.c b/drivers/net/stmmac/dwmac1000_dma.c
index 2ef5a56370e94f07d48993e7f5d151fe84860e8f..ce6163e39cd540416c1c286f5d9aae77cd397adf 100644 (file)
--- a/drivers/net/stmmac/dwmac1000_dma.c
+++ b/drivers/net/stmmac/dwmac1000_dma.c
@@ -33,10 +33,18 @@ static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,
                              u32 dma_rx)
 {
        u32 value = readl(ioaddr + DMA_BUS_MODE);
+       int limit;
+
        /* DMA SW reset */
        value |= DMA_BUS_MODE_SFT_RESET;
        writel(value, ioaddr + DMA_BUS_MODE);
-       do {} while ((readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET));
+       limit = 15000;
+       while (limit--) {
+               if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
+                       break;
+       }
+       if (limit < 0)
+               return -EBUSY;
 
        value = /* DMA_BUS_MODE_FB | */ DMA_BUS_MODE_4PBL |
            ((pbl << DMA_BUS_MODE_PBL_SHIFT) |

diff --git a/drivers/net/stmmac/dwmac100_dma.c b/drivers/net/stmmac/dwmac100_dma.c
index c7279d2b946b634927d9dc9f4e05d010eee4f88c..96aac93b789b9bc690234cb0c259cedd7aa846d2 100644 (file)
--- a/drivers/net/stmmac/dwmac100_dma.c
+++ b/drivers/net/stmmac/dwmac100_dma.c
@@ -35,10 +35,18 @@ static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, u32 dma_tx,
                             u32 dma_rx)
 {
        u32 value = readl(ioaddr + DMA_BUS_MODE);
+       int limit;
+
        /* DMA SW reset */
        value |= DMA_BUS_MODE_SFT_RESET;
        writel(value, ioaddr + DMA_BUS_MODE);
-       do {} while ((readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET));
+       limit = 15000;
+       while (limit--) {
+               if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
+                       break;
+       }
+       if (limit < 0)
+               return -EBUSY;
 
        /* Enable Application Access by writing to DMA CSR0 */
        writel(DMA_BUS_MODE_DEFAULT | (pbl << DMA_BUS_MODE_PBL_SHIFT),