clk: meson-gxbb: expose spdif clock gates
authorJerome Brunet <jbrunet@baylibre.com>
Thu, 2 Mar 2017 14:22:29 +0000 (15:22 +0100)
committerJerome Brunet <jbrunet@baylibre.com>
Mon, 29 May 2017 12:15:01 +0000 (12:15 +0000)
Expose the clock gates required for the spdif output

Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
drivers/clk/meson/gxbb.h
include/dt-bindings/clock/gxbb-clkc.h

index 93b8f07ee7af8c4ddda7077c80013632a716e748..541c85cd0dcb268d3248ce3b5edc405cdc09dc9b 100644 (file)
 /* CLKID_ETH */
 #define CLKID_DEMUX              37
 /* CLKID_AIU_GLUE */
-#define CLKID_IEC958             39
+/* CLKID_IEC958 */
 /* CLKID_I2S_OUT */
 #define CLKID_AMCLK              41
 #define CLKID_AIFIFO2            42
 #define CLKID_GCLK_VENCI_INT     78
 #define CLKID_DAC_CLK            79
 /* CLKID_AOCLK_GATE */
-#define CLKID_IEC958_GATE        81
+/* CLKID_IEC958_GATE */
 #define CLKID_ENC480P            82
 #define CLKID_RNG1               83
 #define CLKID_GCLK_VENCI_INT1    84
index 3190e30b9398ca60037193daf59efd7006bf66ab..ce1c90f70b24762e9b59b1443cdb11d206c00d6c 100644 (file)
@@ -19,6 +19,7 @@
 #define CLKID_SPI              34
 #define CLKID_ETH              36
 #define CLKID_AIU_GLUE         38
+#define CLKID_IEC958           39
 #define CLKID_I2S_OUT          40
 #define CLKID_MIXER_IFACE      44
 #define CLKID_AIU              47
@@ -31,6 +32,7 @@
 #define CLKID_SANA             69
 #define CLKID_GCLK_VENCI_INT0  77
 #define CLKID_AOCLK_GATE       80
+#define CLKID_IEC958_GATE      81
 #define CLKID_AO_I2C           93
 #define CLKID_SD_EMMC_A                94
 #define CLKID_SD_EMMC_B                95