clk: qcom: HDMI source sel is 3 not 2
authorStephen Boyd <sboyd@codeaurora.org>
Wed, 25 Jun 2014 21:44:19 +0000 (14:44 -0700)
committerMike Turquette <mturquette@linaro.org>
Wed, 2 Jul 2014 23:33:18 +0000 (16:33 -0700)
The HDMI PLL input to the tv mux is supposed to be 3, not 2. Fix
the code so that we can properly select the HDMI PLL.

Fixes: 6d00b56fe "clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)"
Reported-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/qcom/mmcc-msm8960.c

index 12f3c0b64fcd75b5d91d76ed0f9b7c786d7e8380..4c449b3170f6dc6470ed1a322f7992ca51ccb3e4 100644 (file)
@@ -1209,7 +1209,7 @@ static struct clk_branch rot_clk = {
 
 static u8 mmcc_pxo_hdmi_map[] = {
        [P_PXO]         = 0,
-       [P_HDMI_PLL]    = 2,
+       [P_HDMI_PLL]    = 3,
 };
 
 static const char *mmcc_pxo_hdmi[] = {