gpio: mvebu: fix blink counter register selection
authorRichard Genoud <richard.genoud@gmail.com>
Thu, 1 Jun 2017 12:18:25 +0000 (14:18 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 9 Jun 2017 07:36:59 +0000 (09:36 +0200)
The blink counter A was always selected because 0 was forced in the
blink select counter register.
The variable 'set' was obviously there to be used as the register value,
selecting the B counter when id==1 and A counter when id==0.

Tested on clearfog-pro (Marvell 88F6828)

Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/gpio/gpio-mvebu.c

index 19a92efabbef705b8826441c966cca4c55838bfd..cdef2c78cb3ba77544ec47afda7d767413d24135 100644 (file)
@@ -747,7 +747,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
                set = U32_MAX;
        else
                return -EINVAL;
-       writel_relaxed(0, mvebu_gpioreg_blink_counter_select(mvchip));
+       writel_relaxed(set, mvebu_gpioreg_blink_counter_select(mvchip));
 
        mvpwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL);
        if (!mvpwm)