clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
authorChen-Yu Tsai <wens@csie.org>
Wed, 31 May 2017 07:58:21 +0000 (15:58 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 31 May 2017 19:57:27 +0000 (21:57 +0200)
The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu-sun8i-h3.h
include/dt-bindings/clock/sun8i-h3-ccu.h

index 85973d1e8165f9a085d9e574cc1f822430802c68..1b4baea37d810351d541d0b0a91d8a78a8524a95 100644 (file)
@@ -29,7 +29,9 @@
 #define CLK_PLL_VIDEO          6
 #define CLK_PLL_VE             7
 #define CLK_PLL_DDR            8
-#define CLK_PLL_PERIPH0                9
+
+/* PLL_PERIPH0 exported for PRCM */
+
 #define CLK_PLL_PERIPH0_2X     10
 #define CLK_PLL_GPU            11
 #define CLK_PLL_PERIPH1                12
index c2afc41d69644af3d9f920a56341d62003630883..e139fe5c62ecd5c8375e7bc8fd503465e475985b 100644 (file)
@@ -43,6 +43,8 @@
 #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_
 #define _DT_BINDINGS_CLK_SUN8I_H3_H_
 
+#define CLK_PLL_PERIPH0                9
+
 #define CLK_CPUX               14
 
 #define CLK_BUS_CE             20