These can now be moved to be local headers in mach-omap2.
Note that this patch removes arch/arm/plat-omap/devices.c as it
will get removed anyways with Paul Walmsley's patch
"ARM: OMAP: split OMAP1, OMAP2+ RNG device registration".
Signed-off-by: Tony Lindgren <tony@atomide.com>
--- /dev/null
+/*
+ * This file contains the address info for various AM33XX modules.
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_AM33XX_H
+#define __ASM_ARCH_AM33XX_H
+
+#define L4_SLOW_AM33XX_BASE 0x48000000
+
+#define AM33XX_SCM_BASE 0x44E10000
+#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
+#define AM33XX_PRCM_BASE 0x44E00000
+
+#endif /* __ASM_ARCH_AM33XX_H */
#include <linux/list.h>
#include <linux/clk.h>
#include <plat/clkdev_omap.h>
-#include <plat/am33xx.h>
+#include "am33xx.h"
#include "iomap.h"
#include "control.h"
#include "clock.h"
#include <mach/ctrl_module_pad_core_44xx.h>
#include <mach/ctrl_module_pad_wkup_44xx.h>
-#include <plat/am33xx.h>
+#include "am33xx.h"
#ifndef __ASSEMBLY__
#define OMAP242X_CTRL_REGADDR(reg) \
#include <asm/suspend.h>
#include <asm/hardware/cache-l2x0.h>
-#include <plat/omap44xx.h>
-
#include "common.h"
+#include "omap44xx.h"
#include "omap4-sar-layout.h"
#include "pm.h"
#include "prcm_mpu44xx.h"
--- /dev/null
+/*
+ * This file contains the processor specific definitions
+ * of the TI OMAP24XX.
+ *
+ * Copyright (C) 2007 Texas Instruments.
+ * Copyright (C) 2007 Nokia Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARCH_OMAP2_H
+#define __ASM_ARCH_OMAP2_H
+
+/*
+ * Please place only base defines here and put the rest in device
+ * specific headers. Note also that some of these defines are needed
+ * for omap1 to compile without adding ifdefs.
+ */
+
+#define L4_24XX_BASE 0x48000000
+#define L4_WK_243X_BASE 0x49000000
+#define L3_24XX_BASE 0x68000000
+
+/* interrupt controller */
+#define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
+#define OMAP24XX_IVA_INTC_BASE 0x40000000
+
+#define OMAP242X_CTRL_BASE L4_24XX_BASE
+#define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
+#define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
+#define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
+#define OMAP2420_PRM_BASE OMAP2420_CM_BASE
+#define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
+#define OMAP2420_SMS_BASE 0x68008000
+#define OMAP2420_GPMC_BASE 0x6800a000
+
+#define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000)
+#define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000)
+#define OMAP2430_CM_BASE (L4_WK_243X_BASE + 0x6000)
+#define OMAP2430_PRM_BASE OMAP2430_CM_BASE
+
+#define OMAP243X_SMS_BASE 0x6C000000
+#define OMAP243X_SDRC_BASE 0x6D000000
+#define OMAP243X_GPMC_BASE 0x6E000000
+#define OMAP243X_SCM_BASE (L4_WK_243X_BASE + 0x2000)
+#define OMAP243X_CTRL_BASE OMAP243X_SCM_BASE
+#define OMAP243X_HS_BASE (L4_24XX_BASE + 0x000ac000)
+
+/* DSP SS */
+#define OMAP2420_DSP_BASE 0x58000000
+#define OMAP2420_DSP_MEM_BASE (OMAP2420_DSP_BASE + 0x0)
+#define OMAP2420_DSP_IPI_BASE (OMAP2420_DSP_BASE + 0x1000000)
+#define OMAP2420_DSP_MMU_BASE (OMAP2420_DSP_BASE + 0x2000000)
+
+#define OMAP243X_DSP_BASE 0x5C000000
+#define OMAP243X_DSP_MEM_BASE (OMAP243X_DSP_BASE + 0x0)
+#define OMAP243X_DSP_MMU_BASE (OMAP243X_DSP_BASE + 0x1000000)
+
+/* Mailbox */
+#define OMAP24XX_MAILBOX_BASE (L4_24XX_BASE + 0x94000)
+
+/* Camera */
+#define OMAP24XX_CAMERA_BASE (L4_24XX_BASE + 0x52000)
+
+/* Security */
+#define OMAP24XX_SEC_BASE (L4_24XX_BASE + 0xA0000)
+#define OMAP24XX_SEC_RNG_BASE (OMAP24XX_SEC_BASE + 0x0000)
+#define OMAP24XX_SEC_DES_BASE (OMAP24XX_SEC_BASE + 0x2000)
+#define OMAP24XX_SEC_SHA1MD5_BASE (OMAP24XX_SEC_BASE + 0x4000)
+#define OMAP24XX_SEC_AES_BASE (OMAP24XX_SEC_BASE + 0x6000)
+#define OMAP24XX_SEC_PKA_BASE (OMAP24XX_SEC_BASE + 0x8000)
+
+#endif /* __ASM_ARCH_OMAP2_H */
+
--- /dev/null
+/*
+ * This file contains the processor specific definitions of the TI OMAP34XX.
+ *
+ * Copyright (C) 2007 Texas Instruments.
+ * Copyright (C) 2007 Nokia Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __ASM_ARCH_OMAP3_H
+#define __ASM_ARCH_OMAP3_H
+
+/*
+ * Please place only base defines here and put the rest in device
+ * specific headers.
+ */
+
+#define L4_34XX_BASE 0x48000000
+#define L4_WK_34XX_BASE 0x48300000
+#define L4_PER_34XX_BASE 0x49000000
+#define L4_EMU_34XX_BASE 0x54000000
+#define L3_34XX_BASE 0x68000000
+
+#define L4_WK_AM33XX_BASE 0x44C00000
+
+#define OMAP3430_32KSYNCT_BASE 0x48320000
+#define OMAP3430_CM_BASE 0x48004800
+#define OMAP3430_PRM_BASE 0x48306800
+#define OMAP343X_SMS_BASE 0x6C000000
+#define OMAP343X_SDRC_BASE 0x6D000000
+#define OMAP34XX_GPMC_BASE 0x6E000000
+#define OMAP343X_SCM_BASE 0x48002000
+#define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE
+
+#define OMAP34XX_IC_BASE 0x48200000
+
+#define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000)
+#define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100)
+#define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400)
+#define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600)
+#define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00)
+#define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00)
+#define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00)
+#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000)
+#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200)
+#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400)
+#define OMAP3430_ISP_CSI2A_REGS1_BASE (OMAP3430_ISP_BASE + 0x1800)
+#define OMAP3430_ISP_CSIPHY2_BASE (OMAP3430_ISP_BASE + 0x1970)
+#define OMAP3630_ISP_CSI2A_REGS2_BASE (OMAP3430_ISP_BASE + 0x19C0)
+#define OMAP3630_ISP_CSI2C_REGS1_BASE (OMAP3430_ISP_BASE + 0x1C00)
+#define OMAP3630_ISP_CSIPHY1_BASE (OMAP3430_ISP_BASE + 0x1D70)
+#define OMAP3630_ISP_CSI2C_REGS2_BASE (OMAP3430_ISP_BASE + 0x1DC0)
+
+#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F)
+#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077)
+#define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF)
+#define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7)
+#define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047)
+#define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F)
+#define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F)
+#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB)
+#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB)
+#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F)
+#define OMAP3430_ISP_CSI2A_REGS1_END (OMAP3430_ISP_CSI2A_REGS1_BASE + 0x16F)
+#define OMAP3430_ISP_CSIPHY2_END (OMAP3430_ISP_CSIPHY2_BASE + 0x00B)
+#define OMAP3630_ISP_CSI2A_REGS2_END (OMAP3630_ISP_CSI2A_REGS2_BASE + 0x3F)
+#define OMAP3630_ISP_CSI2C_REGS1_END (OMAP3630_ISP_CSI2C_REGS1_BASE + 0x16F)
+#define OMAP3630_ISP_CSIPHY1_END (OMAP3630_ISP_CSIPHY1_BASE + 0x00B)
+#define OMAP3630_ISP_CSI2C_REGS2_END (OMAP3630_ISP_CSI2C_REGS2_BASE + 0x3F)
+
+#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000)
+#define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000)
+#define OMAP34XX_UHH_CONFIG_BASE (L4_34XX_BASE + 0x64000)
+#define OMAP34XX_OHCI_BASE (L4_34XX_BASE + 0x64400)
+#define OMAP34XX_EHCI_BASE (L4_34XX_BASE + 0x64800)
+#define OMAP34XX_SR1_BASE 0x480C9000
+#define OMAP34XX_SR2_BASE 0x480CB000
+
+#define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000)
+
+/* Security */
+#define OMAP34XX_SEC_BASE (L4_34XX_BASE + 0xA0000)
+#define OMAP34XX_SEC_SHA1MD5_BASE (OMAP34XX_SEC_BASE + 0x23000)
+#define OMAP34XX_SEC_AES_BASE (OMAP34XX_SEC_BASE + 0x25000)
+
+#endif /* __ASM_ARCH_OMAP3_H */
+
--- /dev/null
+/*:
+ * Address mappings and base address for OMAP4 interconnects
+ * and peripherals.
+ *
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_OMAP44XX_H
+#define __ASM_ARCH_OMAP44XX_H
+
+/*
+ * Please place only base defines here and put the rest in device
+ * specific headers.
+ */
+#define L4_44XX_BASE 0x4a000000
+#define L4_WK_44XX_BASE 0x4a300000
+#define L4_PER_44XX_BASE 0x48000000
+#define L4_EMU_44XX_BASE 0x54000000
+#define L3_44XX_BASE 0x44000000
+#define OMAP44XX_EMIF1_BASE 0x4c000000
+#define OMAP44XX_EMIF2_BASE 0x4d000000
+#define OMAP44XX_DMM_BASE 0x4e000000
+#define OMAP4430_32KSYNCT_BASE 0x4a304000
+#define OMAP4430_CM1_BASE 0x4a004000
+#define OMAP4430_CM_BASE OMAP4430_CM1_BASE
+#define OMAP4430_CM2_BASE 0x4a008000
+#define OMAP4430_PRM_BASE 0x4a306000
+#define OMAP4430_PRCM_MPU_BASE 0x48243000
+#define OMAP44XX_GPMC_BASE 0x50000000
+#define OMAP443X_SCM_BASE 0x4a002000
+#define OMAP443X_CTRL_BASE 0x4a100000
+#define OMAP44XX_IC_BASE 0x48200000
+#define OMAP44XX_IVA_INTC_BASE 0x40000000
+#define IRQ_SIR_IRQ 0x0040
+#define OMAP44XX_GIC_DIST_BASE 0x48241000
+#define OMAP44XX_GIC_CPU_BASE 0x48240100
+#define OMAP44XX_IRQ_GIC_START 32
+#define OMAP44XX_SCU_BASE 0x48240000
+#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
+#define OMAP44XX_L2CACHE_BASE 0x48242000
+#define OMAP44XX_WKUPGEN_BASE 0x48281000
+#define OMAP44XX_MCPDM_BASE 0x40132000
+#define OMAP44XX_SAR_RAM_BASE 0x4a326000
+
+#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)
+#define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000)
+
+#define OMAP4_MMU1_BASE 0x55082000
+#define OMAP4_MMU2_BASE 0x4A066000
+
+#define OMAP44XX_USBTLL_BASE (L4_44XX_BASE + 0x62000)
+#define OMAP44XX_UHH_CONFIG_BASE (L4_44XX_BASE + 0x64000)
+#define OMAP44XX_HSUSB_OHCI_BASE (L4_44XX_BASE + 0x64800)
+#define OMAP44XX_HSUSB_EHCI_BASE (L4_44XX_BASE + 0x64C00)
+
+#endif /* __ASM_ARCH_OMAP44XX_H */
+
--- /dev/null
+/*:
+ * Address mappings and base address for OMAP5 interconnects
+ * and peripherals.
+ *
+ * Copyright (C) 2012 Texas Instruments
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * Sricharan <r.sricharan@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_SOC_OMAP54XX_H
+#define __ASM_SOC_OMAP54XX_H
+
+/*
+ * Please place only base defines here and put the rest in device
+ * specific headers.
+ */
+#define L4_54XX_BASE 0x4a000000
+#define L4_WK_54XX_BASE 0x4ae00000
+#define L4_PER_54XX_BASE 0x48000000
+#define L3_54XX_BASE 0x44000000
+#define OMAP54XX_32KSYNCT_BASE 0x4ae04000
+#define OMAP54XX_CM_CORE_AON_BASE 0x4a004000
+#define OMAP54XX_CM_CORE_BASE 0x4a008000
+#define OMAP54XX_PRM_BASE 0x4ae06000
+#define OMAP54XX_PRCM_MPU_BASE 0x48243000
+#define OMAP54XX_SCM_BASE 0x4a002000
+#define OMAP54XX_CTRL_BASE 0x4a002800
+
+#endif /* __ASM_SOC_OMAP555554XX_H */
#include <linux/linkage.h>
#include <asm/assembler.h>
-#include <plat/omap24xx.h>
-
+#include "omap24xx.h"
#include "sdrc.h"
/* First address of reserved address space? apparently valid for OMAP2 & 3 */
#include <asm/assembler.h>
-#include <plat/omap34xx.h>
#include <plat/sram.h>
+#include "omap34xx.h"
#include "iomap.h"
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#include <asm/memory.h>
#include <asm/hardware/cache-l2x0.h>
-#include <plat/omap44xx.h>
#include <mach/omap-secure.h>
#include "common.h"
+#include "omap44xx.h"
#include "omap4-sar-layout.h"
#if defined(CONFIG_SMP) && defined(CONFIG_PM)
#include <plat/cpu.h>
-#include <plat/omap24xx.h>
-#include <plat/omap34xx.h>
-#include <plat/omap44xx.h>
-#include <plat/ti81xx.h>
-#include <plat/am33xx.h>
-#include <plat/omap54xx.h>
+#include "omap24xx.h"
+#include "omap34xx.h"
+#include "omap44xx.h"
+#include "ti81xx.h"
+#include "am33xx.h"
+#include "omap54xx.h"
--- /dev/null
+/*
+ * This file contains the address data for various TI81XX modules.
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_TI81XX_H
+#define __ASM_ARCH_TI81XX_H
+
+#define L4_SLOW_TI81XX_BASE 0x48000000
+
+#define TI81XX_SCM_BASE 0x48140000
+#define TI81XX_CTRL_BASE TI81XX_SCM_BASE
+#define TI81XX_PRCM_BASE 0x48180000
+
+#define TI81XX_ARM_INTC_BASE 0x48200000
+
+#endif /* __ASM_ARCH_TI81XX_H */
#
# Common support
-obj-y := common.o sram.o clock.o devices.o dma.o mux.o \
- fb.o counter_32k.o
+obj-y := common.o sram.o clock.o dma.o mux.o fb.o counter_32k.o
obj-m :=
obj-n :=
obj- :=
+++ /dev/null
-/*
- * linux/arch/arm/plat-omap/devices.c
- *
- * Common platform device setup/initialization for OMAP1 and OMAP2
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#include <linux/gpio.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/memblock.h>
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/mach/map.h>
-#include <asm/memblock.h>
-
-#include <plat/tc.h>
-#include <plat/mmc.h>
-#include <plat/menelaus.h>
-#include <plat/omap44xx.h>
-
-/*-------------------------------------------------------------------------*/
-
-#if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
-
-#ifdef CONFIG_ARCH_OMAP2
-#define OMAP_RNG_BASE 0x480A0000
-#else
-#define OMAP_RNG_BASE 0xfffe5000
-#endif
-
-static struct resource rng_resources[] = {
- {
- .start = OMAP_RNG_BASE,
- .end = OMAP_RNG_BASE + 0x4f,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device omap_rng_device = {
- .name = "omap_rng",
- .id = -1,
- .num_resources = ARRAY_SIZE(rng_resources),
- .resource = rng_resources,
-};
-
-static void omap_init_rng(void)
-{
- (void) platform_device_register(&omap_rng_device);
-}
-#else
-static inline void omap_init_rng(void) {}
-#endif
-
-/*
- * This gets called after board-specific INIT_MACHINE, and initializes most
- * on-chip peripherals accessible on this board (except for few like USB):
- *
- * (a) Does any "standard config" pin muxing needed. Board-specific
- * code will have muxed GPIO pins and done "nonstandard" setup;
- * that code could live in the boot loader.
- * (b) Populating board-specific platform_data with the data drivers
- * rely on to handle wiring variations.
- * (c) Creating platform devices as meaningful on this board and
- * with this kernel configuration.
- *
- * Claiming GPIOs, and setting their direction and initial values, is the
- * responsibility of the device drivers. So is responding to probe().
- *
- * Board-specific knowledge like creating devices or pin setup is to be
- * kept out of drivers as much as possible. In particular, pin setup
- * may be handled by the boot loader, and drivers should expect it will
- * normally have been done by the time they're probed.
- */
-static int __init omap_init_devices(void)
-{
- /* please keep these calls, and their implementations above,
- * in alphabetical order so they're easier to sort through.
- */
- omap_init_rng();
- return 0;
-}
-arch_initcall(omap_init_devices);
+++ /dev/null
-/*
- * This file contains the address info for various AM33XX modules.
- *
- * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_AM33XX_H
-#define __ASM_ARCH_AM33XX_H
-
-#define L4_SLOW_AM33XX_BASE 0x48000000
-
-#define AM33XX_SCM_BASE 0x44E10000
-#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
-#define AM33XX_PRCM_BASE 0x44E00000
-
-#endif /* __ASM_ARCH_AM33XX_H */
+++ /dev/null
-/*
- * arch/arm/plat-omap/include/mach/omap24xx.h
- *
- * This file contains the processor specific definitions
- * of the TI OMAP24XX.
- *
- * Copyright (C) 2007 Texas Instruments.
- * Copyright (C) 2007 Nokia Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#ifndef __ASM_ARCH_OMAP2_H
-#define __ASM_ARCH_OMAP2_H
-
-/*
- * Please place only base defines here and put the rest in device
- * specific headers. Note also that some of these defines are needed
- * for omap1 to compile without adding ifdefs.
- */
-
-#define L4_24XX_BASE 0x48000000
-#define L4_WK_243X_BASE 0x49000000
-#define L3_24XX_BASE 0x68000000
-
-/* interrupt controller */
-#define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
-#define OMAP24XX_IVA_INTC_BASE 0x40000000
-
-#define OMAP242X_CTRL_BASE L4_24XX_BASE
-#define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
-#define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
-#define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
-#define OMAP2420_PRM_BASE OMAP2420_CM_BASE
-#define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
-#define OMAP2420_SMS_BASE 0x68008000
-#define OMAP2420_GPMC_BASE 0x6800a000
-
-#define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000)
-#define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000)
-#define OMAP2430_CM_BASE (L4_WK_243X_BASE + 0x6000)
-#define OMAP2430_PRM_BASE OMAP2430_CM_BASE
-
-#define OMAP243X_SMS_BASE 0x6C000000
-#define OMAP243X_SDRC_BASE 0x6D000000
-#define OMAP243X_GPMC_BASE 0x6E000000
-#define OMAP243X_SCM_BASE (L4_WK_243X_BASE + 0x2000)
-#define OMAP243X_CTRL_BASE OMAP243X_SCM_BASE
-#define OMAP243X_HS_BASE (L4_24XX_BASE + 0x000ac000)
-
-/* DSP SS */
-#define OMAP2420_DSP_BASE 0x58000000
-#define OMAP2420_DSP_MEM_BASE (OMAP2420_DSP_BASE + 0x0)
-#define OMAP2420_DSP_IPI_BASE (OMAP2420_DSP_BASE + 0x1000000)
-#define OMAP2420_DSP_MMU_BASE (OMAP2420_DSP_BASE + 0x2000000)
-
-#define OMAP243X_DSP_BASE 0x5C000000
-#define OMAP243X_DSP_MEM_BASE (OMAP243X_DSP_BASE + 0x0)
-#define OMAP243X_DSP_MMU_BASE (OMAP243X_DSP_BASE + 0x1000000)
-
-/* Mailbox */
-#define OMAP24XX_MAILBOX_BASE (L4_24XX_BASE + 0x94000)
-
-/* Camera */
-#define OMAP24XX_CAMERA_BASE (L4_24XX_BASE + 0x52000)
-
-/* Security */
-#define OMAP24XX_SEC_BASE (L4_24XX_BASE + 0xA0000)
-#define OMAP24XX_SEC_RNG_BASE (OMAP24XX_SEC_BASE + 0x0000)
-#define OMAP24XX_SEC_DES_BASE (OMAP24XX_SEC_BASE + 0x2000)
-#define OMAP24XX_SEC_SHA1MD5_BASE (OMAP24XX_SEC_BASE + 0x4000)
-#define OMAP24XX_SEC_AES_BASE (OMAP24XX_SEC_BASE + 0x6000)
-#define OMAP24XX_SEC_PKA_BASE (OMAP24XX_SEC_BASE + 0x8000)
-
-#endif /* __ASM_ARCH_OMAP2_H */
-
+++ /dev/null
-/*
- * arch/arm/plat-omap/include/mach/omap34xx.h
- *
- * This file contains the processor specific definitions of the TI OMAP34XX.
- *
- * Copyright (C) 2007 Texas Instruments.
- * Copyright (C) 2007 Nokia Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef __ASM_ARCH_OMAP3_H
-#define __ASM_ARCH_OMAP3_H
-
-/*
- * Please place only base defines here and put the rest in device
- * specific headers.
- */
-
-#define L4_34XX_BASE 0x48000000
-#define L4_WK_34XX_BASE 0x48300000
-#define L4_PER_34XX_BASE 0x49000000
-#define L4_EMU_34XX_BASE 0x54000000
-#define L3_34XX_BASE 0x68000000
-
-#define L4_WK_AM33XX_BASE 0x44C00000
-
-#define OMAP3430_32KSYNCT_BASE 0x48320000
-#define OMAP3430_CM_BASE 0x48004800
-#define OMAP3430_PRM_BASE 0x48306800
-#define OMAP343X_SMS_BASE 0x6C000000
-#define OMAP343X_SDRC_BASE 0x6D000000
-#define OMAP34XX_GPMC_BASE 0x6E000000
-#define OMAP343X_SCM_BASE 0x48002000
-#define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE
-
-#define OMAP34XX_IC_BASE 0x48200000
-
-#define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000)
-#define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100)
-#define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400)
-#define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600)
-#define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00)
-#define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00)
-#define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00)
-#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000)
-#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200)
-#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400)
-#define OMAP3430_ISP_CSI2A_REGS1_BASE (OMAP3430_ISP_BASE + 0x1800)
-#define OMAP3430_ISP_CSIPHY2_BASE (OMAP3430_ISP_BASE + 0x1970)
-#define OMAP3630_ISP_CSI2A_REGS2_BASE (OMAP3430_ISP_BASE + 0x19C0)
-#define OMAP3630_ISP_CSI2C_REGS1_BASE (OMAP3430_ISP_BASE + 0x1C00)
-#define OMAP3630_ISP_CSIPHY1_BASE (OMAP3430_ISP_BASE + 0x1D70)
-#define OMAP3630_ISP_CSI2C_REGS2_BASE (OMAP3430_ISP_BASE + 0x1DC0)
-
-#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F)
-#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077)
-#define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF)
-#define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7)
-#define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047)
-#define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F)
-#define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F)
-#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB)
-#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB)
-#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F)
-#define OMAP3430_ISP_CSI2A_REGS1_END (OMAP3430_ISP_CSI2A_REGS1_BASE + 0x16F)
-#define OMAP3430_ISP_CSIPHY2_END (OMAP3430_ISP_CSIPHY2_BASE + 0x00B)
-#define OMAP3630_ISP_CSI2A_REGS2_END (OMAP3630_ISP_CSI2A_REGS2_BASE + 0x3F)
-#define OMAP3630_ISP_CSI2C_REGS1_END (OMAP3630_ISP_CSI2C_REGS1_BASE + 0x16F)
-#define OMAP3630_ISP_CSIPHY1_END (OMAP3630_ISP_CSIPHY1_BASE + 0x00B)
-#define OMAP3630_ISP_CSI2C_REGS2_END (OMAP3630_ISP_CSI2C_REGS2_BASE + 0x3F)
-
-#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000)
-#define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000)
-#define OMAP34XX_UHH_CONFIG_BASE (L4_34XX_BASE + 0x64000)
-#define OMAP34XX_OHCI_BASE (L4_34XX_BASE + 0x64400)
-#define OMAP34XX_EHCI_BASE (L4_34XX_BASE + 0x64800)
-#define OMAP34XX_SR1_BASE 0x480C9000
-#define OMAP34XX_SR2_BASE 0x480CB000
-
-#define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000)
-
-/* Security */
-#define OMAP34XX_SEC_BASE (L4_34XX_BASE + 0xA0000)
-#define OMAP34XX_SEC_SHA1MD5_BASE (OMAP34XX_SEC_BASE + 0x23000)
-#define OMAP34XX_SEC_AES_BASE (OMAP34XX_SEC_BASE + 0x25000)
-
-#endif /* __ASM_ARCH_OMAP3_H */
-
+++ /dev/null
-/*:
- * Address mappings and base address for OMAP4 interconnects
- * and peripherals.
- *
- * Copyright (C) 2009 Texas Instruments
- *
- * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_OMAP44XX_H
-#define __ASM_ARCH_OMAP44XX_H
-
-/*
- * Please place only base defines here and put the rest in device
- * specific headers.
- */
-#define L4_44XX_BASE 0x4a000000
-#define L4_WK_44XX_BASE 0x4a300000
-#define L4_PER_44XX_BASE 0x48000000
-#define L4_EMU_44XX_BASE 0x54000000
-#define L3_44XX_BASE 0x44000000
-#define OMAP44XX_EMIF1_BASE 0x4c000000
-#define OMAP44XX_EMIF2_BASE 0x4d000000
-#define OMAP44XX_DMM_BASE 0x4e000000
-#define OMAP4430_32KSYNCT_BASE 0x4a304000
-#define OMAP4430_CM1_BASE 0x4a004000
-#define OMAP4430_CM_BASE OMAP4430_CM1_BASE
-#define OMAP4430_CM2_BASE 0x4a008000
-#define OMAP4430_PRM_BASE 0x4a306000
-#define OMAP4430_PRCM_MPU_BASE 0x48243000
-#define OMAP44XX_GPMC_BASE 0x50000000
-#define OMAP443X_SCM_BASE 0x4a002000
-#define OMAP443X_CTRL_BASE 0x4a100000
-#define OMAP44XX_IC_BASE 0x48200000
-#define OMAP44XX_IVA_INTC_BASE 0x40000000
-#define IRQ_SIR_IRQ 0x0040
-#define OMAP44XX_GIC_DIST_BASE 0x48241000
-#define OMAP44XX_GIC_CPU_BASE 0x48240100
-#define OMAP44XX_IRQ_GIC_START 32
-#define OMAP44XX_SCU_BASE 0x48240000
-#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
-#define OMAP44XX_L2CACHE_BASE 0x48242000
-#define OMAP44XX_WKUPGEN_BASE 0x48281000
-#define OMAP44XX_MCPDM_BASE 0x40132000
-#define OMAP44XX_SAR_RAM_BASE 0x4a326000
-
-#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)
-#define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000)
-
-#define OMAP4_MMU1_BASE 0x55082000
-#define OMAP4_MMU2_BASE 0x4A066000
-
-#define OMAP44XX_USBTLL_BASE (L4_44XX_BASE + 0x62000)
-#define OMAP44XX_UHH_CONFIG_BASE (L4_44XX_BASE + 0x64000)
-#define OMAP44XX_HSUSB_OHCI_BASE (L4_44XX_BASE + 0x64800)
-#define OMAP44XX_HSUSB_EHCI_BASE (L4_44XX_BASE + 0x64C00)
-
-#endif /* __ASM_ARCH_OMAP44XX_H */
-
+++ /dev/null
-/*:
- * Address mappings and base address for OMAP5 interconnects
- * and peripherals.
- *
- * Copyright (C) 2012 Texas Instruments
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * Sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_SOC_OMAP54XX_H
-#define __ASM_SOC_OMAP54XX_H
-
-/*
- * Please place only base defines here and put the rest in device
- * specific headers.
- */
-#define L4_54XX_BASE 0x4a000000
-#define L4_WK_54XX_BASE 0x4ae00000
-#define L4_PER_54XX_BASE 0x48000000
-#define L3_54XX_BASE 0x44000000
-#define OMAP54XX_32KSYNCT_BASE 0x4ae04000
-#define OMAP54XX_CM_CORE_AON_BASE 0x4a004000
-#define OMAP54XX_CM_CORE_BASE 0x4a008000
-#define OMAP54XX_PRM_BASE 0x4ae06000
-#define OMAP54XX_PRCM_MPU_BASE 0x48243000
-#define OMAP54XX_SCM_BASE 0x4a002000
-#define OMAP54XX_CTRL_BASE 0x4a002800
-
-#endif /* __ASM_SOC_OMAP555554XX_H */
+++ /dev/null
-/*
- * This file contains the address data for various TI81XX modules.
- *
- * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_TI81XX_H
-#define __ASM_ARCH_TI81XX_H
-
-#define L4_SLOW_TI81XX_BASE 0x48000000
-
-#define TI81XX_SCM_BASE 0x48140000
-#define TI81XX_CTRL_BASE TI81XX_SCM_BASE
-#define TI81XX_PRCM_BASE 0x48180000
-
-#define TI81XX_ARM_INTC_BASE 0x48200000
-
-#endif /* __ASM_ARCH_TI81XX_H */
projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / commitdiff