arm64: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
authorJaehoon Chung <jh80.chung@samsung.com>
Thu, 3 Nov 2016 06:21:34 +0000 (15:21 +0900)
committerHeiko Stuebner <heiko@sntech.de>
Wed, 9 Nov 2016 14:08:55 +0000 (15:08 +0100)
In drivers/mmc/core/host.c, there is "max-freqeuncy" property.
It should be same behavior, So Use the "max-frequency" instead of
"clock-freq-min-max".

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts
arch/arm64/boot/dts/rockchip/rk3368.dtsi
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index 5797933ef80e68454fca1eb5c8ed03dec566f434..0acf8a2bbecfcb195117343221294141877b3f7f 100644 (file)
 &sdmmc {
        bus-width = <4>;
        clock-frequency = <50000000>;
-       clock-freq-min-max = <400000 50000000>;
+       max-frequency = <50000000>;
        cap-sd-highspeed;
        card-detect-delay = <200>;
        keep-power-in-suspend;
index 2f8e19ff65a566be919f8fd20727eebd3d05314f..4f2b6bdf87f22b7fef27e0679de8cad7030548af 100644 (file)
        sdmmc: dwmmc@ff0c0000 {
                compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff0c0000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
                         <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
        sdio0: dwmmc@ff0d0000 {
                compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff0d0000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
                         <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
        emmc: dwmmc@ff0f0000 {
                compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff0f0000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
                         <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
index cbb7f8bb131c829e872a5f7524bb5b8d2d4b1c32..172e7edd4915a08c23862084fe4ae442225e474d 100644 (file)
                             "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xfe310000 0x0 0x4000>;
                interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
                         <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                             "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xfe320000 0x0 0x4000>;
                interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
                         <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
                clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";