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ARM: dts: imx6qdl-sabrelite: move spi-nor CS to pinctrl_ecspi1
authorTroy Kisky <troy.kisky@boundarydevices.com>
Tue, 17 Dec 2013 01:12:54 +0000 (18:12 -0700)
committerShawn Guo <shawn.guo@linaro.org>
Sun, 9 Feb 2014 13:29:23 +0000 (21:29 +0800)
This patch moves pin EIM_D19 (CS) from pinctrl_hog to pinctrl_ecspi1.
It also explicitly sets the pad to 0x000b1.

Before this patch, it has the value 0x100b1 if using mainline u-boot.
So this patch also removes hysteresis since the pad is always an output.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi patch | blob | blame | history

diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index b4646c46f02ddefb048c9117081f5635f2be3058..895d4d6810c407672a8e6af30b58e1cc771a2d58 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,7 +114,6 @@
        imx6q-sabrelite {
                pinctrl_hog: hoggrp {
                        fsl,pins = <
-                               MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x80000000
                                MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
                                MX6QDL_PAD_EIM_D23__GPIO3_IO23  0x80000000
                                MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x80000000
@@ -135,6 +134,7 @@
                                MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
                                MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
                                MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
+                               MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
                        >;
                };