ARM: bcm21664: Add board support.

Add support for the Broadcom BCM21664 mobile SoC. It has two Cortex-A9
cores like the BCM281xx family of chips. BCM21664 and BCM281xx share
many IP blocks in addition to the ARM cores.

Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>

diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index 01649132c9f215cdee2ad68afc7bc4e5e997c8df..4e4a2ed6851e5ea2d8478c48a29817aa1a8089f6 100644 (file)
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (C) 2012-2013 Broadcom Corporation
+# Copyright (C) 2012-2014 Broadcom Corporation
 #
 # This program is free software; you can redistribute it and/or
 # modify it under the terms of the GNU General Public License as
@@ -10,7 +10,9 @@
 # of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
 
-obj-$(CONFIG_ARCH_BCM_MOBILE)  := board_bcm281xx.o bcm_kona_smc.o bcm_kona_smc_asm.o kona.o
+obj-$(CONFIG_ARCH_BCM_MOBILE)  := board_bcm281xx.o board_bcm21664.o \
+                               bcm_kona_smc.o bcm_kona_smc_asm.o kona.o
+
 plus_sec := $(call as-instr,.arch_extension sec,+sec)
 AFLAGS_bcm_kona_smc_asm.o      :=-Wa,-march=armv7-a$(plus_sec)
 obj-$(CONFIG_ARCH_BCM_5301X)   += bcm_5301x.o

diff --git a/arch/arm/mach-bcm/board_bcm21664.c b/arch/arm/mach-bcm/board_bcm21664.c
new file mode 100644 (file)
index 0000000..acc1573
--- /dev/null
+++ b/arch/arm/mach-bcm/board_bcm21664.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2014 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clocksource.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+
+#include <asm/mach/arch.h>
+
+#include "bcm_kona_smc.h"
+#include "kona.h"
+
+#define RSTMGR_DT_STRING               "brcm,bcm21664-resetmgr"
+
+#define RSTMGR_REG_WR_ACCESS_OFFSET    0
+#define RSTMGR_REG_CHIP_SOFT_RST_OFFSET        4
+
+#define RSTMGR_WR_PASSWORD             0xa5a5
+#define RSTMGR_WR_PASSWORD_SHIFT       8
+#define RSTMGR_WR_ACCESS_ENABLE                1
+
+static void bcm21664_restart(enum reboot_mode mode, const char *cmd)
+{
+       void __iomem *base;
+       struct device_node *resetmgr;
+
+       resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING);
+       if (!resetmgr) {
+               pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n");
+               return;
+       }
+       base = of_iomap(resetmgr, 0);
+       if (!base) {
+               pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n");
+               return;
+       }
+
+       /*
+        * A soft reset is triggered by writing a 0 to bit 0 of the soft reset
+        * register. To write to that register we must first write the password
+        * and the enable bit in the write access enable register.
+        */
+       writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
+               RSTMGR_WR_ACCESS_ENABLE,
+               base + RSTMGR_REG_WR_ACCESS_OFFSET);
+       writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
+
+       /* Wait for reset */
+       while (1);
+}
+
+static void __init bcm21664_init(void)
+{
+       of_platform_populate(NULL, of_default_bus_match_table, NULL,
+               &platform_bus);
+       kona_l2_cache_init();
+}
+
+static const char * const bcm21664_dt_compat[] = {
+       "brcm,bcm21664",
+       NULL,
+};
+
+DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor")
+       .init_machine = bcm21664_init,
+       .restart = bcm21664_restart,
+       .dt_compat = bcm21664_dt_compat,
+MACHINE_END