phy: ti-pipe3: use *syscon* framework API to power on/off the PHY

Deprecate using phy-omap-control driver to power on/off the PHY and
use *syscon* framework to do the same.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Rob Herring <robh@kernel.org>

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 9cf9446eaf2eac41d57251cb5853037e2b31e7c2..e06f980fa2ba61680b8d79b0c8fb5c7fc9556ec7 100644 (file)
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -77,8 +77,6 @@ Required properties:
    * "div-clk" - apll clock
 
 Optional properties:
- - ctrl-module : phandle of the control module used by PHY driver to power on
-   the PHY.
  - id: If there are multiple instance of the same type, in order to
    differentiate between each instance "id" can be used (e.g., multi-lane PCIe
    PHY). If "id" is not provided, it is set to default value of '1'.
@@ -86,6 +84,14 @@ Optional properties:
    CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
    register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
 
+Deprecated properties:
+ - ctrl-module : phandle of the control module used by PHY driver to power on
+   the PHY.
+
+Recommended properies:
+ - syscon-phy-power : phandle/offset pair. Phandle to the system control
+   module and the register offset to power on/off the PHY.
+
 This is usually a subnode of ocp2scp to which it is connected.
 
 usb3phy@4a084400 {

diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 0ce4194e09a55c1a0fbe2dd11d66c871a3fcf06e..a47b1902a36fda79053b91eaa7288c47bb537029 100644 (file)
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -56,6 +56,15 @@
 
 #define SATA_PLL_SOFT_RESET    BIT(18)
 
+#define PIPE3_PHY_PWRCTL_CLK_CMD_MASK  0x003FC000
+#define PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT 14
+
+#define PIPE3_PHY_PWRCTL_CLK_FREQ_MASK 0xFFC00000
+#define PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT        22
+
+#define PIPE3_PHY_TX_RX_POWERON                0x3
+#define PIPE3_PHY_TX_RX_POWEROFF       0x0
+
 /*
  * This is an Empirical value that works, need to confirm the actual
  * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -86,8 +95,10 @@ struct ti_pipe3 {
        struct clk              *refclk;
        struct clk              *div_clk;
        struct pipe3_dpll_map   *dpll_map;
+       struct regmap           *phy_power_syscon; /* ctrl. reg. acces */
        struct regmap           *dpll_reset_syscon; /* ctrl. reg. acces */
        unsigned int            dpll_reset_reg; /* reg. index within syscon */
+       unsigned int            power_reg; /* power reg. index within syscon */
        bool                    sata_refclk_enabled;
 };
 
@@ -144,20 +155,49 @@ static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy);
 
 static int ti_pipe3_power_off(struct phy *x)
 {
+       u32 val;
+       int ret;
        struct ti_pipe3 *phy = phy_get_drvdata(x);
 
-       omap_control_phy_power(phy->control_dev, 0);
+       if (!phy->phy_power_syscon) {
+               omap_control_phy_power(phy->control_dev, 0);
+               return 0;
+       }
 
-       return 0;
+       val = PIPE3_PHY_TX_RX_POWEROFF << PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+
+       ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,
+                                PIPE3_PHY_PWRCTL_CLK_CMD_MASK, val);
+       return ret;
 }
 
 static int ti_pipe3_power_on(struct phy *x)
 {
+       u32 val;
+       u32 mask;
+       int ret;
+       unsigned long rate;
        struct ti_pipe3 *phy = phy_get_drvdata(x);
 
-       omap_control_phy_power(phy->control_dev, 1);
+       if (!phy->phy_power_syscon) {
+               omap_control_phy_power(phy->control_dev, 1);
+               return 0;
+       }
 
-       return 0;
+       rate = clk_get_rate(phy->sys_clk);
+       if (!rate) {
+               dev_err(phy->dev, "Invalid clock rate\n");
+               return -EINVAL;
+       }
+       rate = rate / 1000000;
+       mask = OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK |
+                 OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK;
+       val = PIPE3_PHY_TX_RX_POWERON << PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+       val |= rate << OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT;
+
+       ret = regmap_update_bits(phy->phy_power_syscon, phy->power_reg,
+                                mask, val);
+       return ret;
 }
 
 static int ti_pipe3_dpll_wait_lock(struct ti_pipe3 *phy)
@@ -334,7 +374,8 @@ static int ti_pipe3_get_clk(struct ti_pipe3 *phy)
                phy->wkupclk = ERR_PTR(-ENODEV);
        }
 
-       if (!of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
+       if (!of_device_is_compatible(node, "ti,phy-pipe3-pcie") ||
+           phy->phy_power_syscon) {
                phy->sys_clk = devm_clk_get(dev, "sysclk");
                if (IS_ERR(phy->sys_clk)) {
                        dev_err(dev, "unable to get sysclk\n");
@@ -383,19 +424,36 @@ static int ti_pipe3_get_sysctrl(struct ti_pipe3 *phy)
        struct device_node *control_node;
        struct platform_device *control_pdev;
 
-       control_node = of_parse_phandle(node, "ctrl-module", 0);
-       if (!control_node) {
-               dev_err(dev, "Failed to get control device phandle\n");
-               return -EINVAL;
+       phy->phy_power_syscon = syscon_regmap_lookup_by_phandle(node,
+                                                       "syscon-phy-power");
+       if (IS_ERR(phy->phy_power_syscon)) {
+               dev_dbg(dev,
+                       "can't get syscon-phy-power, using control device\n");
+               phy->phy_power_syscon = NULL;
+       } else {
+               if (of_property_read_u32_index(node,
+                                              "syscon-phy-power", 1,
+                                              &phy->power_reg)) {
+                       dev_err(dev, "couldn't get power reg. offset\n");
+                       return -EINVAL;
+               }
        }
 
-       control_pdev = of_find_device_by_node(control_node);
-       if (!control_pdev) {
-               dev_err(dev, "Failed to get control device\n");
-               return -EINVAL;
-       }
+       if (!phy->phy_power_syscon) {
+               control_node = of_parse_phandle(node, "ctrl-module", 0);
+               if (!control_node) {
+                       dev_err(dev, "Failed to get control device phandle\n");
+                       return -EINVAL;
+               }
 
-       phy->control_dev = &control_pdev->dev;
+               control_pdev = of_find_device_by_node(control_node);
+               if (!control_pdev) {
+                       dev_err(dev, "Failed to get control device\n");
+                       return -EINVAL;
+               }
+
+               phy->control_dev = &control_pdev->dev;
+       }
 
        if (of_device_is_compatible(node, "ti,phy-pipe3-sata")) {
                phy->dpll_reset_syscon = syscon_regmap_lookup_by_phandle(node,