drm/i915: Compact gen8_ring_sync
authorTvrtko Ursulin <tvrtko.ursulin@intel.com>
Wed, 29 Jun 2016 15:09:30 +0000 (16:09 +0100)
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>
Thu, 30 Jun 2016 16:20:45 +0000 (17:20 +0100)
Store the semaphore offset in a temporary variable to avoid
having to get the VMA offset twice.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/intel_ringbuffer.c

index aef6824b4c7598d4c9f5231c8bbaff032aaf460f..6d5e861fe6c170e97bd6459ca95703e3b93e4363 100644 (file)
@@ -1547,6 +1547,7 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
 {
        struct intel_engine_cs *waiter = waiter_req->engine;
        struct drm_i915_private *dev_priv = waiter_req->i915;
+       u64 offset = GEN8_WAIT_OFFSET(waiter, signaller->id);
        struct i915_hw_ppgtt *ppgtt;
        int ret;
 
@@ -1558,10 +1559,8 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
                                MI_SEMAPHORE_GLOBAL_GTT |
                                MI_SEMAPHORE_SAD_GTE_SDD);
        intel_ring_emit(waiter, seqno);
-       intel_ring_emit(waiter,
-                       lower_32_bits(GEN8_WAIT_OFFSET(waiter, signaller->id)));
-       intel_ring_emit(waiter,
-                       upper_32_bits(GEN8_WAIT_OFFSET(waiter, signaller->id)));
+       intel_ring_emit(waiter, lower_32_bits(offset));
+       intel_ring_emit(waiter, upper_32_bits(offset));
        intel_ring_advance(waiter);
 
        /* When the !RCS engines idle waiting upon a semaphore, they lose their