ARM: 8038/1: iwmmxt: explicitly check for supported architectures
authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Thu, 24 Apr 2014 21:54:58 +0000 (22:54 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 25 Apr 2014 11:07:32 +0000 (12:07 +0100)
iwmmxt.S requires special treatment of coprocessor access registers
for PJ4 and XScale-based CPUs. It only checks for CPU_PJ4 and drops
down to XScale-based treatment on all other architectures.

As some PJ4B also come with iWMMXt and also need PJ4 treatment,
rework the corresponding preprocessor directives to explicitly
check for supported architectures and fail on unsupported ones.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/iwmmxt.S

index a08783823b32fdde6dd73d7022b042b64c321bca..2452dd1bef53b0eb719dcda0ce127c2f5ddaeec9 100644 (file)
 #include <asm/thread_info.h>
 #include <asm/asm-offsets.h>
 
-#if defined(CONFIG_CPU_PJ4)
+#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B)
 #define PJ4(code...)           code
 #define XSC(code...)
-#else
+#elif defined(CONFIG_CPU_MOHAWK) || \
+       defined(CONFIG_CPU_XSC3) || \
+       defined(CONFIG_CPU_XSCALE)
 #define PJ4(code...)
 #define XSC(code...)           code
+#else
+#error "Unsupported iWMMXt architecture"
 #endif
 
 #define MMX_WR0                        (0x00)