#define TIMER_INTVAL_REG(val) (0x10 * (val) + 0x14)
#define TIMER_CNTVAL_REG(val) (0x10 * (val) + 0x18)
-#define TIMER_SCAL 16
-
static void __iomem *timer_base;
/*
clocksource_mmio_init(timer_base + TIMER_CNTVAL_REG(1), node->name,
rate, 300, 32, clocksource_mmio_readl_down);
- writel(rate / (TIMER_SCAL * HZ),
- timer_base + TIMER_INTVAL_REG(0));
+ writel(rate / HZ, timer_base + TIMER_INTVAL_REG(0));
/* set clock source to HOSC, 16 pre-division */
val = readl(timer_base + TIMER_CTL_REG(0));
sun4i_clockevent.cpumask = cpumask_of(0);
- clockevents_config_and_register(&sun4i_clockevent, rate / TIMER_SCAL,
- 0x1, 0xff);
+ clockevents_config_and_register(&sun4i_clockevent, rate, 0x1,
+ 0xffffffff);
}
CLOCKSOURCE_OF_DECLARE(sun4i, "allwinner,sun4i-timer",
sun4i_timer_init);