struct decon_reg_data *regs)
{
int i;
+ struct v4l2_subdev *sd;
+ int afbc_enabled;
- decon->d.prev_vgf_win_id[0] = -1;
- decon->d.prev_vgf_win_id[1] = -1;
+ for (i = 0; i < decon->dt.max_win; ++i)
+ decon->d.prev_vgf_win_id[i] = -1;
for (i = 0; i < decon->dt.max_win; ++i) {
- if (regs->dpp_config[i].idma_type == IDMA_VGF0)
- decon->d.prev_vgf_win_id[0] = i;
- if (regs->dpp_config[i].idma_type == IDMA_VGF1)
- decon->d.prev_vgf_win_id[1] = i;
+ if (regs->dpp_config[i].state == DECON_WIN_STATE_BUFFER) {
+ sd = decon->dpp_sd[DPU_DMA2CH(regs->dpp_config[i].idma_type)];
+ afbc_enabled = 0;
+ v4l2_subdev_call(sd, core, ioctl,
+ DPP_AFBC_ATTR_ENABLED, &afbc_enabled);
+ if (regs->dpp_config[i].compression && afbc_enabled)
+ decon->d.prev_vgf_win_id[DPU_DMA2CH(regs->dpp_config[i].idma_type)] = i;
+ else
+ decon->d.prev_vgf_win_id[DPU_DMA2CH(regs->dpp_config[i].idma_type)] = -1;
+
+ decon_dbg("%s:%d win(%d), dma(%d), afbc(%d), save(%d)\n", __func__, __LINE__,
+ i, regs->dpp_config[i].idma_type, afbc_enabled,
+ decon->d.prev_vgf_win_id[DPU_DMA2CH(regs->dpp_config[i].idma_type)]);
+ }
}
}
static void decon_dump_afbc_handle(struct decon_device *decon,
struct decon_dma_buf_data (*dma_bufs)[MAX_PLANE_CNT])
{
- int size;
+ int i;
int win_id = 0;
+ int size;
void *v_addr;
decon_info("%s +\n", __func__);
- if (test_bit(DPU_DMA2CH(IDMA_VGF0), &decon->prev_used_dpp)) {
- win_id = decon->d.prev_vgf_win_id[0];
- if (win_id < 0) {
- decon_err("%s: win_id(%d) is invalid\n", __func__, win_id);
- return;
- }
-#if defined(CONFIG_SUPPORT_LEGACY_ION)
- decon->d.handle[win_id][0] = dma_bufs[win_id][0].ion_handle;
- decon_info("VGF0(WIN%d): handle=0x%p\n",
- win_id, decon->d.handle[win_id][0]);
-
- v_addr = ion_map_kernel(decon->ion_client,
- dma_bufs[win_id][0].ion_handle);
- if (IS_ERR_OR_NULL(v_addr)) {
- decon_err("%s: failed to map afbc buffer\n", __func__);
- return;
- }
-#else
- decon->d.dmabuf[win_id][0] = dma_bufs[win_id][0].dma_buf;
- decon_info("VGF0(WIN%d): dmabuf=0x%p\n",
- win_id, decon->d.dmabuf[win_id][0]);
- v_addr = dma_buf_vmap(dma_bufs[win_id][0].dma_buf);
- if (IS_ERR_OR_NULL(v_addr)) {
- decon_err("%s: failed to map afbc buffer\n", __func__);
- return;
- }
-#endif
- size = dma_bufs[win_id][0].dma_buf->size;
-
- decon_info("DV(0x%p), KV(0x%p), size(%d)\n",
- (void *)dma_bufs[win_id][0].dma_addr,
- v_addr, size);
- }
+ for (i = 0; i < decon->dt.max_win; i++) {
+ if (decon->d.prev_vgf_win_id[i] != -1
+ && test_bit(i, &decon->prev_used_dpp)) {
+ win_id = decon->d.prev_vgf_win_id[i];
- if (test_bit(DPU_DMA2CH(IDMA_VGF1), &decon->prev_used_dpp)) {
- win_id = decon->d.prev_vgf_win_id[1];
- if (win_id < 0) {
- decon_err("%s: win_id(%d) is invalid\n", __func__, win_id);
- return;
- }
#if defined(CONFIG_SUPPORT_LEGACY_ION)
- decon->d.handle[win_id][0] = dma_bufs[win_id][0].ion_handle;
- decon_info("VGF1(WIN%d): handle=0x%p\n",
- win_id, decon->d.handle[win_id][0]);
-
- v_addr = ion_map_kernel(decon->ion_client,
- dma_bufs[win_id][0].ion_handle);
- if (IS_ERR_OR_NULL(v_addr)) {
- decon_err("%s: failed to map afbc buffer\n", __func__);
- return;
- }
+ decon->d.handle[win_id][0] = dma_bufs[win_id][0].ion_handle;
+ decon_info("DMA%d(WIN%d): handle=0x%p\n",
+ i, win_id, decon->d.handle[win_id][0]);
+
+ v_addr = ion_map_kernel(decon->ion_client,
+ dma_bufs[win_id][0].ion_handle);
+ if (IS_ERR_OR_NULL(v_addr)) {
+ decon_err("%s: failed to map afbc buffer\n", __func__);
+ return;
+ }
#else
- decon->d.dmabuf[win_id][0] = dma_bufs[win_id][0].dma_buf;
- decon_info("VGF1(WIN%d): dmabuf=0x%p\n",
- win_id, decon->d.dmabuf[win_id][0]);
- v_addr = dma_buf_vmap(dma_bufs[win_id][0].dma_buf);
- if (IS_ERR_OR_NULL(v_addr)) {
- decon_err("%s: failed to map afbc buffer\n", __func__);
- return;
- }
+ decon->d.dmabuf[win_id][0] = dma_bufs[win_id][0].dma_buf;
+ decon_info("DMA%d(WIN%d): dmabuf=0x%p\n",
+ i, win_id, decon->d.dmabuf[win_id][0]);
+ v_addr = dma_buf_vmap(dma_bufs[win_id][0].dma_buf);
+ if (IS_ERR_OR_NULL(v_addr)) {
+ decon_err("%s: failed to map afbc buffer\n", __func__);
+ return;
+ }
#endif
- size = dma_bufs[win_id][0].dma_buf->size;
+ size = dma_bufs[win_id][0].dma_buf->size;
- decon_info("DV(0x%p), KV(0x%p), size(%d)\n",
- (void *)dma_bufs[win_id][0].dma_addr,
- v_addr, size);
+ decon_info("DV(0x%p), KV(0x%p), size(%d)\n",
+ (void *)dma_bufs[win_id][0].dma_addr,
+ v_addr, size);
+ }
}
decon_info("%s -\n", __func__);
if (!regs->dpp_config[i].compression)
continue;
- if (test_bit(DPU_DMA2CH(IDMA_VGF0), &decon->cur_using_dpp)) {
- afbc_info->is_afbc[0] = true;
-
- if (regs->dma_buf_data[i][0].dma_buf == NULL)
- continue;
-
- afbc_info->dma_addr[0] =
- regs->dma_buf_data[i][0].dma_addr;
- afbc_info->dma_buf[0] =
- regs->dma_buf_data[i][0].dma_buf;
- }
-
- if (test_bit(DPU_DMA2CH(IDMA_VGF1), &decon->cur_using_dpp)) {
- afbc_info->is_afbc[1] = true;
+ if (test_bit(i, &decon->cur_using_dpp)) {
+ afbc_info->is_afbc[i] = true;
if (regs->dma_buf_data[i][0].dma_buf == NULL)
continue;
- afbc_info->dma_addr[1] =
+ afbc_info->dma_addr[i] =
regs->dma_buf_data[i][0].dma_addr;
- afbc_info->dma_buf[1] =
+ afbc_info->dma_buf[i] =
regs->dma_buf_data[i][0].dma_buf;
+#if defined(DPU_DUMP_BUFFER_IRQ)
+ afbc_info->dma_v_addr[i] =
+ dma_buf_vmap(afbc_info->dma_buf[i]);
+ dma_buf_vunmap(afbc_info->dma_buf[i], afbc_info->dma_v_addr[i]);
+#endif
}
}
}
#endif
-#if defined(CONFIG_EXYNOS_AFBC_DEBUG)
+#if defined(DPU_DUMP_BUFFER_IRQ)
/* id : VGF0=0, VGF1=1 */
static void dpu_dump_data_to_console(void *v_addr, int buf_size, int id)
{
int i, j;
struct decon_device *decon;
struct dpu_afbc_info *afbc_info;
- void *v_addr[2];
- int size[2];
+ void *v_addr[MAX_DECON_WIN];
+ int size[MAX_DECON_WIN];
for (i = 0; i < 3; i++) {
decon = get_decon_drvdata(i);
afbc_info = &decon->d.prev_afbc_info;
decon_info("%s: previous AFBC channel information\n", __func__);
- for (j = 0; j < 2; ++j) { /* VGF0(0), VGF1(1) */
+ for (j = 0; j < MAX_DECON_WIN; ++j) { /* all the dpp that has afbc */
if (!afbc_info->is_afbc[j])
continue;
v_addr[j] = dma_buf_vmap(afbc_info->dma_buf[j]);
size[j] = afbc_info->dma_buf[j]->size;
- decon_info("\t[%s] Base(0x%p), KV(0x%p), size(%d)\n",
- j ? "VGF1" : "VGF0",
- (void *)afbc_info->dma_addr[j],
+ decon_info("\t[DMA%d] Base(0x%p), KV(0x%p), size(%d)\n",
+ j, (void *)afbc_info->dma_addr[j],
v_addr[j], size[j]);
dma_buf_vunmap(afbc_info->dma_buf[j], v_addr[j]);
}
afbc_info = &decon->d.cur_afbc_info;
decon_info("%s: current AFBC channel information\n", __func__);
- for (j = 0; j < 2; ++j) { /* VGF0(0), VGF1(1) */
+ for (j = 0; j < MAX_DECON_WIN; ++j) { /* all the dpp that has afbc */
if (!afbc_info->is_afbc[j])
continue;
v_addr[j] = dma_buf_vmap(afbc_info->dma_buf[j]);
size[j] = afbc_info->dma_buf[j]->size;
- decon_info("\t[%s] Base(0x%p), KV(0x%p), size(%d)\n",
- j ? "VGF1" : "VGF0",
- (void *)afbc_info->dma_addr[j],
+ decon_info("\t[DMA%d] Base(0x%p), KV(0x%p), size(%d)\n",
+ j, (void *)afbc_info->dma_addr[j],
v_addr[j], size[j]);
dma_buf_vunmap(afbc_info->dma_buf[j], v_addr[j]);
}
int i;
int id_idx = 0;
int dump_size = 128;
- int decon_cnt;
struct decon_device *decon;
struct dpu_afbc_info *afbc_info;
- void *v_addr;
-
- decon_cnt = get_decon_drvdata(0)->dt.decon_cnt;
if (dpp->state == DPP_STATE_ON) {
- for (i = 0; i < decon_cnt; i++) {
+ for (i = 0; i < MAX_DECON_CNT; i++) {
decon = get_decon_drvdata(i);
if (decon == NULL)
continue;
- if (DPU_CH2DMA(dpp->id) == IDMA_GF)
- id_idx = 1;
+ id_idx = dpp->id;
afbc_info = &decon->d.cur_afbc_info;
if (!afbc_info->is_afbc[id_idx])
else
dump_size = afbc_info->dma_buf[id_idx]->size / 16;
- v_addr = dma_buf_vmap(afbc_info->dma_buf[id_idx]);
decon_info("Base(0x%p), KV(0x%p), size(%d)\n",
(void *)afbc_info->dma_addr[id_idx],
- v_addr, dump_size);
-
- if (IS_ERR_OR_NULL(v_addr))
- continue;
+ afbc_info->dma_v_addr[id_idx], dump_size);
- dpu_dump_data_to_console(v_addr, dump_size, dpp->id);
- dma_buf_vunmap(afbc_info->dma_buf[id_idx], v_addr);
+ dpu_dump_data_to_console(afbc_info->dma_v_addr[id_idx],
+ dump_size, dpp->id);
}
}
for (i = 0; i < decon->dt.dpp_cnt; i++) {
if (test_bit(i, &decon->prev_used_dpp)) {
dpp = get_dpp_drvdata(i);
-#if defined(CONFIG_EXYNOS_AFBC_DEBUG)
+#if defined(DPU_DUMP_BUFFER_IRQ)
dpu_dump_buffer_data(dpp);
#endif
}