Timeouts during a command that has a data phase can result in the next
command issued after the command that failed not being processed, i.e. no
interrupt ever occurs to indicate the command has completed. This failure
can result in a deadlock.
This patch resets the data state machine to clear the error in case of a
command timeout.
Tested on OMAP3430 chip and intensive MMC/SD device removal while
transferring data.
Signed-off-by: Andy Lowe <alowe@mvista.com>
Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
}
end_cmd = 1;
}
- if (host->data)
+ if (host->data) {
mmc_dma_cleanup(host);
+ OMAP_HSMMC_WRITE(host->base, SYSCTL,
+ OMAP_HSMMC_READ(host->base,
+ SYSCTL) | SRD);
+ while (OMAP_HSMMC_READ(host->base,
+ SYSCTL) & SRD)
+ ;
+ }
}
if ((status & DATA_TIMEOUT) ||
(status & DATA_CRC)) {