ARM: dts: Add support for the cpuimx51 board from Eukrea and its baseboard.
authorDenis Carikli <denis@eukrea.com>
Fri, 7 Feb 2014 07:50:23 +0000 (15:50 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Sun, 9 Feb 2014 13:32:17 +0000 (21:32 +0800)
The following devices/functionalities were added:
 * Main and secondary UARTs.
 * i2c and the pcf8563 device.
 * Ethernet.
 * NAND.
 * The BP1 button.
 * The LED.
 * Watchdog
 * SD.

Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Eric Bénard <eric@eukrea.com>
Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts [new file with mode: 0644]

index b9d6a8b485e0bdeba13c1848391fca3ca263341b..6e2b67ac9bb549d47a6b7782f45eb9d5411ed75c 100644 (file)
@@ -146,6 +146,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
        imx51-apf51.dtb \
        imx51-apf51dev.dtb \
        imx51-babbage.dtb \
+       imx51-eukrea-mbimxsd51-baseboard.dtb \
        imx53-ard.dtb \
        imx53-evk.dtb \
        imx53-m53evk.dtb \
diff --git a/arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi b/arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi
new file mode 100644 (file)
index 0000000..9b3acf6
--- /dev/null
@@ -0,0 +1,93 @@
+/*
+ * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include "imx51.dtsi"
+
+/ {
+       model = "Eukrea CPUIMX51";
+       compatible = "eukrea,cpuimx51", "fsl,imx51";
+
+       memory {
+               reg = <0x90000000 0x10000000>; /* 256M */
+       };
+};
+
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec>;
+       status = "okay";
+};
+
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       pcf8563@51 {
+               compatible = "nxp,pcf8563";
+               reg = <0x51>;
+       };
+};
+
+&iomuxc {
+       imx51-eukrea {
+               pinctrl_tsc2007_1: tsc2007grp-1 {
+                       fsl,pins = <
+                               MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5
+                               MX51_PAD_NANDF_D8__GPIO4_0 0x1f5
+                       >;
+               };
+
+               pinctrl_fec: fecgrp {
+                       fsl,pins = <
+                               MX51_PAD_DI_GP3__FEC_TX_ER              0x80000000
+                               MX51_PAD_DI2_PIN4__FEC_CRS              0x80000000
+                               MX51_PAD_DI2_PIN2__FEC_MDC              0x80000000
+                               MX51_PAD_DI2_PIN3__FEC_MDIO             0x80000000
+                               MX51_PAD_DI2_DISP_CLK__FEC_RDATA1       0x80000000
+                               MX51_PAD_DI_GP4__FEC_RDATA2             0x80000000
+                               MX51_PAD_DISP2_DAT0__FEC_RDATA3         0x80000000
+                               MX51_PAD_DISP2_DAT1__FEC_RX_ER          0x80000000
+                               MX51_PAD_DISP2_DAT6__FEC_TDATA1         0x80000000
+                               MX51_PAD_DISP2_DAT7__FEC_TDATA2         0x80000000
+                               MX51_PAD_DISP2_DAT8__FEC_TDATA3         0x80000000
+                               MX51_PAD_DISP2_DAT9__FEC_TX_EN          0x80000000
+                               MX51_PAD_DISP2_DAT10__FEC_COL           0x80000000
+                               MX51_PAD_DISP2_DAT11__FEC_RX_CLK        0x80000000
+                               MX51_PAD_DISP2_DAT12__FEC_RX_DV         0x80000000
+                               MX51_PAD_DISP2_DAT13__FEC_TX_CLK        0x80000000
+                               MX51_PAD_DISP2_DAT14__FEC_RDATA0        0x80000000
+                               MX51_PAD_DISP2_DAT15__FEC_TDATA0        0x80000000
+                       >;
+               };
+
+               pinctrl_i2c1: i2c1grp {
+                       fsl,pins = <
+                               MX51_PAD_SD2_CMD__I2C1_SCL              0x400001ed
+                               MX51_PAD_SD2_CLK__I2C1_SDA              0x400001ed
+                       >;
+               };
+       };
+};
+
+&nfc {
+       nand-bus-width = <8>;
+       nand-ecc-mode = "hw";
+       nand-on-flash-bbt;
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
new file mode 100644 (file)
index 0000000..5cec4f3
--- /dev/null
@@ -0,0 +1,175 @@
+/*
+ * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+/dts-v1/;
+#include "imx51-eukrea-cpuimx51.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       model = "Eukrea CPUIMX51";
+       compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
+
+       gpio_keys {
+               compatible = "gpio-keys";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpiokeys_1>;
+
+               button-1 {
+                       label = "BP1";
+                       gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
+                       linux,code = <256>;
+                       gpio-key,wakeup;
+                       linux,input-type = <1>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpioled>;
+
+               led1 {
+                       label = "led1";
+                       gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "heartbeat";
+               };
+       };
+
+       sound {
+               compatible = "eukrea,asoc-tlv320";
+               eukrea,model = "imx51-eukrea-tlv320aic23";
+               ssi-controller = <&ssi2>;
+               fsl,mux-int-port = <2>;
+               fsl,mux-ext-port = <3>;
+       };
+};
+
+&audmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_audmux>;
+       status = "okay";
+};
+
+&esdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
+       fsl,cd-controller;
+       status = "okay";
+};
+
+&i2c1 {
+       tlv320aic23: codec@1a {
+               compatible = "ti,tlv320aic23";
+               reg = <0x1a>;
+       };
+};
+
+&iomuxc {
+       imx51-eukrea {
+               pinctrl_audmux: audmuxgrp {
+                       fsl,pins = <
+                               MX51_PAD_AUD3_BB_TXD__AUD3_TXD          0x80000000
+                               MX51_PAD_AUD3_BB_RXD__AUD3_RXD          0x80000000
+                               MX51_PAD_AUD3_BB_CK__AUD3_TXC           0x80000000
+                               MX51_PAD_AUD3_BB_FS__AUD3_TXFS          0x80000000
+                       >;
+               };
+
+               pinctrl_esdhc1: esdhc1grp {
+                       fsl,pins = <
+                               MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
+                               MX51_PAD_SD1_CLK__SD1_CLK               0x20d5
+                               MX51_PAD_SD1_DATA0__SD1_DATA0           0x20d5
+                               MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
+                               MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
+                               MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
+                       >;
+               };
+
+               pinctrl_uart1: uart1grp {
+                       fsl,pins = <
+                               MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
+                               MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
+                       >;
+               };
+
+               pinctrl_uart3: uart3grp {
+                       fsl,pins = <
+                               MX51_PAD_UART3_RXD__UART3_RXD           0x1c5
+                               MX51_PAD_UART3_TXD__UART3_TXD           0x1c5
+                       >;
+               };
+
+               pinctrl_uart3_rtscts: uart3rtsctsgrp {
+                       fsl,pins = <
+                               MX51_PAD_KEY_COL4__UART3_RTS            0x1c5
+                               MX51_PAD_KEY_COL5__UART3_CTS            0x1c5
+                       >;
+               };
+
+               pinctrl_backlight_1: backlightgrp-1 {
+                       fsl,pins = <
+                               MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5
+                       >;
+               };
+
+               pinctrl_esdhc1_cd: esdhc1_cd {
+                       fsl,pins = <
+                               MX51_PAD_GPIO1_0__SD1_CD 0x20d5
+                       >;
+               };
+
+               pinctrl_gpiokeys_1: gpiokeysgrp-1 {
+                       fsl,pins = <
+                               MX51_PAD_NANDF_D9__GPIO3_31 0x1f5
+                       >;
+               };
+
+               pinctrl_gpioled: gpioledgrp-1 {
+                       fsl,pins = <
+                               MX51_PAD_NANDF_D10__GPIO3_30 0x80000000
+                       >;
+               };
+
+               pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
+                       fsl,pins = <
+                               MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
+                       >;
+               };
+       };
+};
+
+&ssi2 {
+       codec-handle = <&tlv320aic23>;
+       fsl,mode = "i2s-slave";
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       fsl,uart-has-rtscts;
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
+       fsl,uart-has-rtscts;
+       status = "okay";
+};