drm/i915: provide interface for audio driver to query cdclk
authorJani Nikula <jani.nikula@intel.com>
Fri, 4 Jul 2014 02:00:37 +0000 (10:00 +0800)
committerTakashi Iwai <tiwai@suse.de>
Fri, 4 Jul 2014 05:46:09 +0000 (07:46 +0200)
For Haswell and Broadwell, if the display power well has been disabled,
the display audio controller divider values EM4 M VALUE and EM5 N VALUE
will have been lost. The CDCLK frequency is required for reprogramming them
to generate 24MHz HD-A link BCLK. So provide a private interface for the
audio driver to query CDCLK.

This is a stopgap solution until a more generic interface between audio
and display drivers has been implemented.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
drivers/gpu/drm/i915/intel_pm.c
include/drm/i915_powerwell.h

index 6463f0201cf225dd095cb7c5f97b534c17b2141c..409d6267685401897aaa27ffe080ce727d86338a 100644 (file)
@@ -6053,6 +6053,27 @@ int i915_release_power_well(void)
 }
 EXPORT_SYMBOL_GPL(i915_release_power_well);
 
+/*
+ * Private interface for the audio driver to get CDCLK in kHz.
+ *
+ * Caller must request power well using i915_request_power_well() prior to
+ * making the call.
+ */
+int i915_get_cdclk_freq(void)
+{
+       struct drm_i915_private *dev_priv;
+
+       if (!hsw_pwr)
+               return -ENODEV;
+
+       dev_priv = container_of(hsw_pwr, struct drm_i915_private,
+                               power_domains);
+
+       return intel_ddi_get_cdclk_freq(dev_priv);
+}
+EXPORT_SYMBOL_GPL(i915_get_cdclk_freq);
+
+
 #define POWER_DOMAIN_MASK (BIT(POWER_DOMAIN_NUM) - 1)
 
 #define HSW_ALWAYS_ON_POWER_DOMAINS (                  \
index 2baba99960948d8fd9eac0cb1a9ea217fe511843..baa6f11b1837408ed2e1130d87a8bc269fc7ce4c 100644 (file)
@@ -32,5 +32,6 @@
 /* For use by hda_i915 driver */
 extern int i915_request_power_well(void);
 extern int i915_release_power_well(void);
+extern int i915_get_cdclk_freq(void);
 
 #endif                         /* _I915_POWERWELL_H_ */