arm64: KVM: Avoid setting the upper 32 bits of VTCR_EL2 to 1
authorWill Deacon <will.deacon@arm.com>
Thu, 13 Dec 2018 16:06:14 +0000 (16:06 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 9 Jan 2019 15:16:45 +0000 (16:16 +0100)
commit df655b75c43fba0f2621680ab261083297fd6d16 upstream.

Although bit 31 of VTCR_EL2 is RES1, we inadvertently end up setting all
of the upper 32 bits to 1 as well because we define VTCR_EL2_RES1 as
signed, which is sign-extended when assigning to kvm->arch.vtcr.

Lucky for us, the architecture currently treats these upper bits as RES0
so, whilst we've been naughty, we haven't set fire to anything yet.

Cc: <stable@vger.kernel.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm64/include/asm/kvm_arm.h

index 0dbc1c6ab7dc3ef1f1a761a70e75c340133b6ab2..68dedca5a47ed97b39bea958872c4a3b499f1333 100644 (file)
@@ -99,7 +99,7 @@
                         TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK | TCR_EL2_T0SZ_MASK)
 
 /* VTCR_EL2 Registers bits */
-#define VTCR_EL2_RES1          (1 << 31)
+#define VTCR_EL2_RES1          (1U << 31)
 #define VTCR_EL2_HD            (1 << 22)
 #define VTCR_EL2_HA            (1 << 21)
 #define VTCR_EL2_PS_MASK       TCR_EL2_PS_MASK