if (ret)
return ret;
+ /* The gianfar device will try to use the same ID created below to find
+ * this bus, to coordinate register access (since they share). */
mdio_dev = platform_device_register_simple("fsl-gianfar_mdio",
res.start&0xfffff, &res, 1);
if (IS_ERR(mdio_dev))
of_node_put(mdio);
}
+ /* Get MDIO bus controlled by this eTSEC, if any. Normally only
+ * eTSEC 1 will control an MDIO bus, not necessarily the same
+ * bus that its PHY is on ('mdio' above), so we can't just use
+ * that. What we do is look for a gianfar mdio device that has
+ * overlapping registers with this device. That's really the
+ * whole point, to find the device sharing our registers to
+ * coordinate access with it.
+ */
+ for_each_compatible_node(mdio, NULL, "fsl,gianfar-mdio") {
+ if (of_address_to_resource(mdio, 0, &res))
+ continue;
+
+ if (res.start >= r[0].start && res.end <= r[0].end) {
+ /* Get the ID the mdio bus platform device was
+ * registered with. gfar_data.bus_id is
+ * different because it's for finding a PHY,
+ * while this is for finding a MII bus.
+ */
+ gfar_data.mdio_bus = res.start&0xfffff;
+ of_node_put(mdio);
+ break;
+ }
+ }
+
ret =
platform_device_add_data(gfar_dev, &gfar_data,
sizeof(struct
struct gfar_mii __iomem *regs =
(void __iomem *)&priv->regs->gfar_mii_regs;
int tbipa = gfar_read(&priv->regs->tbipa);
+ struct mii_bus *bus = gfar_get_miibus(priv);
+
+ if (bus)
+ mutex_lock(&bus->mdio_lock);
/* Single clk mode, mii mode off(for serdes communication) */
gfar_local_mdio_write(regs, tbipa, MII_TBICON, TBICON_CLK_SELECT);
gfar_local_mdio_write(regs, tbipa, MII_BMCR, BMCR_ANENABLE |
BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
+
+ if (bus)
+ mutex_unlock(&bus->mdio_lock);
}
static void init_registers(struct net_device *dev)
.remove = gfar_mdio_remove,
};
+static int match_mdio_bus(struct device *dev, void *data)
+{
+ const struct gfar_private *priv = data;
+ const struct platform_device *pdev = to_platform_device(dev);
+
+ return !strcmp(pdev->name, gianfar_mdio_driver.name) &&
+ pdev->id == priv->einfo->mdio_bus;
+}
+
+/* Given a gfar_priv structure, find the mii_bus controlled by this device (not
+ * necessarily the same as the bus the gfar's PHY is on), if one exists.
+ * Normally only the first gianfar controls a mii_bus. */
+struct mii_bus *gfar_get_miibus(const struct gfar_private *priv)
+{
+ /*const*/ struct device *d;
+
+ d = bus_find_device(gianfar_mdio_driver.bus, NULL, (void *)priv,
+ match_mdio_bus);
+ return d ? dev_get_drvdata(d) : NULL;
+}
+
int __init gfar_mdio_init(void)
{
return driver_register(&gianfar_mdio_driver);
#ifndef __GIANFAR_MII_H
#define __GIANFAR_MII_H
+struct gfar_private; /* forward ref */
+
#define MIIMIND_BUSY 0x00000001
#define MIIMIND_NOTVALID 0x00000004
int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id,
int regnum, u16 value);
int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum);
+struct mii_bus *gfar_get_miibus(const struct gfar_private *priv);
int __init gfar_mdio_init(void);
void gfar_mdio_exit(void);
#endif /* GIANFAR_PHY_H */
u32 device_flags;
/* board specific information */
u32 board_flags;
- char bus_id[MII_BUS_ID_SIZE];
+ int mdio_bus; /* Bus controlled by us */
+ char bus_id[MII_BUS_ID_SIZE]; /* Bus PHY is on */
u32 phy_id;
u8 mac_addr[6];
phy_interface_t interface;