(CR):[kane]:dts: add sar sensor sx9325 drivers

add sar sensor sx9325 drivers

Change-Id: Ic383a09580dae90fda73fc90d130ec1e0f4fdbbf
Signed-off-by: hq_guohongtao5_tmp <guohongtao5@huaqin.com>

diff --git a/arch/arm64/boot/dts/exynos/wing-sensor.dtsi b/arch/arm64/boot/dts/exynos/wing-sensor.dtsi
index 315a4801f6901ee3bd8dee59dcce45243b50bac1..1bed4b98ea6295be5b3ee9bfeb45a12c9f248eea 100755 (executable)
--- a/arch/arm64/boot/dts/exynos/wing-sensor.dtsi
+++ b/arch/arm64/boot/dts/exynos/wing-sensor.dtsi
@@ -21,63 +21,24 @@
        status = "okay";
        samsung,reset-before-trans;
        clock-frequency = <400000>;
-       Semtech_sx9320@28 {
-               compatible = "Semtech,sx932x";
+       sx9325@28 {
+
+               compatible = "semtech,sx9325";
                reg = <0x28>;
-               cap_vdd-supply = <&l3_reg>;
-               Semtech,nirq-gpio = <&gpa2 6 0>;
-               pinctrl-names = "default";
-               pinctrl-0 = <&cap_int_status>;
-               egistec,gpio_rst = <&gpa1 1 0>;
-               status = "ok";  /**/
-               Semtech,reg-num = <46>; /* total registers number to initialize*/
-                       Semtech,reg-init  = /bits/ 8 < 0x10 0x16
-                                0x20 0x00
-                                0x23 0x00
-                                0x24 0x44
-                                0x26 0x01
-                                0x27 0x44
-                                0x28 0x01 /*PH0 to CS0 input*/
-                                0x29 0x04
-                                0x2A 0x10 /*PH2 CS2-input,CS1-dync,CS0-HZ*/
-                                0x2B 0x00
-                                0x2C 0x12
-                                0x2D 0x08
-                                0x30 0x09
-                                0x31 0x09
-                                0x32 0x08
-                                0x33 0x20
-                                0x34 0x0C
-                                0x35 0x00
-                                0x36 0x1b
-                                0x37 0x1b
-                                0x40 0x00
-                                0x41 0x00
-                                0x42 0x00
-                                0x43 0x00
-                                0x44 0x00
-                                0x45 0x05
-                                0x46 0x00
-                                0x47 0x00
-                                0x48 0x00
-                                0x49 0x80
-                                0x4A 0x00
-                                0x4B 0x00
-                                0x4C 0x00
-                                0x4D 0x00
-                                0x4E 0x80
-                                0x4F 0x0C
-                                0x50 0x00
-                                0x51 0x70
-                                0x52 0x20
-                                0x53 0xE1
-                                0x54 0xF0
-                                0x05 0x70
-                                0x06 0x00
-                                0x07 0x00
-                                0x08 0x00
-                               0x11 0x27>;
+               cap_vdd-supply = <&l3_reg>;
+               gpios = <&gpa2 6 0>; /* IRQ */
+               pinctrl-names = "default";
+               pinctrl-0 = <&cap_int_status>;
+               cap,use_channel = <0x0f>;
+               cap,use_channel_top = <0x00>;
+               cap,use_channel_bottom = <0x01>;
+               cap,raw_data_channel = <0x01>;
+               cap,scan_period = <0x02>;
+               reg_array_len = <5>;
+               reg_array_val = <0x36 0x1b 0x37 0x1b 0x4a 0x66 0x4b 0x00 0x4c 0x00>;
+
 
        };
 
+
 };