#define MEM_SYNC 0xe0000001
#define MEM_VRAM 0xe0010000
+#include "nouveau_dma.h"
struct nvd0_display {
struct nouveau_gpuobj *mem;
struct nouveau_framebuffer *nvfb = nouveau_framebuffer(fb);
u32 *push;
- /*XXX*/
- nv_crtc->fb.tile_flags = MEM_VRAM;
-
push = evo_wait(fb->dev, 0, 16);
if (push) {
evo_mthd(push, 0x0460 + (nv_crtc->index * 0x300), 1);
evo_data(push, (fb->height << 16) | fb->width);
evo_data(push, nvfb->r_pitch);
evo_data(push, nvfb->r_format);
- evo_data(push, nv_crtc->fb.tile_flags);
+ evo_data(push, nvfb->r_dma);
evo_kick(push, fb->dev, 0);
}
+ nv_crtc->fb.tile_flags = nvfb->r_dma;
return 0;
}
nv_wo32(disp->mem, 0x0000, MEM_SYNC);
nv_wo32(disp->mem, 0x0004, (0x1000 << 9) | 0x00000001);
- nv_wo32(disp->mem, 0x1020, 0x00000009);
+ nv_wo32(disp->mem, 0x1020, 0x00000049);
nv_wo32(disp->mem, 0x1024, 0x00000000);
nv_wo32(disp->mem, 0x1028, (dev_priv->vram_size - 1) >> 8);
nv_wo32(disp->mem, 0x102c, 0x00000000);
nv_wo32(disp->mem, 0x0008, MEM_VRAM);
nv_wo32(disp->mem, 0x000c, (0x1020 << 9) | 0x00000001);
+ nv_wo32(disp->mem, 0x1040, 0x00000009);
+ nv_wo32(disp->mem, 0x1044, 0x00000000);
+ nv_wo32(disp->mem, 0x1048, (dev_priv->vram_size - 1) >> 8);
+ nv_wo32(disp->mem, 0x104c, 0x00000000);
+ nv_wo32(disp->mem, 0x1050, 0x00000000);
+ nv_wo32(disp->mem, 0x1054, 0x00000000);
+ nv_wo32(disp->mem, 0x0010, NvEvoVRAM_LP);
+ nv_wo32(disp->mem, 0x0014, (0x1040 << 9) | 0x00000001);
+
+ nv_wo32(disp->mem, 0x1060, 0x0fe00009);
+ nv_wo32(disp->mem, 0x1064, 0x00000000);
+ nv_wo32(disp->mem, 0x1068, (dev_priv->vram_size - 1) >> 8);
+ nv_wo32(disp->mem, 0x106c, 0x00000000);
+ nv_wo32(disp->mem, 0x1070, 0x00000000);
+ nv_wo32(disp->mem, 0x1074, 0x00000000);
+ nv_wo32(disp->mem, 0x0018, NvEvoFB32);
+ nv_wo32(disp->mem, 0x001c, (0x1060 << 9) | 0x00000001);
+
pinstmem->flush(dev);
/* push buffers for evo channels */