serial: sh-sci: Add SCIFA/B SCPCR register definitions

Add the register definitions for the Serial Port Control and Data
Registers on SCIFA/SCIFB, which are needed for RTS/CTS pin control.

Extracted from patches by Magnus Damm <damm+renesas@opensource.se>.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index e7d6566fafaf3da538788ef34260c6dd220dba5b..7ee0f686bdf1b216b14ffdc77046c0d46113b2d3 100644 (file)
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -168,6 +168,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = sci_reg_invalid,
                [SCLSR]         = sci_reg_invalid,
                [HSSRR]         = sci_reg_invalid,
+               [SCPCR]         = sci_reg_invalid,
+               [SCPDR]         = sci_reg_invalid,
        },
 
        /*
@@ -188,6 +190,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = sci_reg_invalid,
                [SCLSR]         = sci_reg_invalid,
                [HSSRR]         = sci_reg_invalid,
+               [SCPCR]         = sci_reg_invalid,
+               [SCPDR]         = sci_reg_invalid,
        },
 
        /*
@@ -207,6 +211,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = sci_reg_invalid,
                [SCLSR]         = sci_reg_invalid,
                [HSSRR]         = sci_reg_invalid,
+               [SCPCR]         = { 0x30, 16 },
+               [SCPDR]         = { 0x34, 16 },
        },
 
        /*
@@ -226,6 +232,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = sci_reg_invalid,
                [SCLSR]         = sci_reg_invalid,
                [HSSRR]         = sci_reg_invalid,
+               [SCPCR]         = { 0x30, 16 },
+               [SCPDR]         = { 0x34, 16 },
        },
 
        /*
@@ -246,6 +254,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = { 0x20, 16 },
                [SCLSR]         = { 0x24, 16 },
                [HSSRR]         = sci_reg_invalid,
+               [SCPCR]         = sci_reg_invalid,
+               [SCPDR]         = sci_reg_invalid,
        },
 
        /*
@@ -265,6 +275,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = sci_reg_invalid,
                [SCLSR]         = sci_reg_invalid,
                [HSSRR]         = sci_reg_invalid,
+               [SCPCR]         = sci_reg_invalid,
+               [SCPDR]         = sci_reg_invalid,
        },
 
        /*
@@ -284,6 +296,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = { 0x20, 16 },
                [SCLSR]         = { 0x24, 16 },
                [HSSRR]         = sci_reg_invalid,
+               [SCPCR]         = sci_reg_invalid,
+               [SCPDR]         = sci_reg_invalid,
        },
 
        /*
@@ -303,6 +317,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = { 0x20, 16 },
                [SCLSR]         = { 0x24, 16 },
                [HSSRR]         = { 0x40, 16 },
+               [SCPCR]         = sci_reg_invalid,
+               [SCPDR]         = sci_reg_invalid,
        },
 
        /*
@@ -323,6 +339,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = sci_reg_invalid,
                [SCLSR]         = { 0x24, 16 },
                [HSSRR]         = sci_reg_invalid,
+               [SCPCR]         = sci_reg_invalid,
+               [SCPDR]         = sci_reg_invalid,
        },
 
        /*
@@ -343,6 +361,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = { 0x24, 16 },
                [SCLSR]         = { 0x28, 16 },
                [HSSRR]         = sci_reg_invalid,
+               [SCPCR]         = sci_reg_invalid,
+               [SCPDR]         = sci_reg_invalid,
        },
 
        /*
@@ -363,6 +383,8 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
                [SCSPTR]        = sci_reg_invalid,
                [SCLSR]         = sci_reg_invalid,
                [HSSRR]         = sci_reg_invalid,
+               [SCPCR]         = sci_reg_invalid,
+               [SCPDR]         = sci_reg_invalid,
        },
 };
 

diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h
index 8b4447e66708aea50d9d51fc6f55944addee4c0f..2bae842fb0fc0ae68b7b5749db6b36bbc386f1d4 100644 (file)
--- a/drivers/tty/serial/sh-sci.h
+++ b/drivers/tty/serial/sh-sci.h
@@ -24,6 +24,8 @@ enum {
        SCRFDR,                         /* Receive FIFO Data Count Register */
        SCSPTR,                         /* Serial Port Register */
        HSSRR,                          /* Sampling Rate Register */
+       SCPCR,                          /* Serial Port Control Register */
+       SCPDR,                          /* Serial Port Data Register */
 
        SCIx_NR_REGS,
 };
@@ -79,6 +81,14 @@ enum {
 /* HSSRR HSCIF */
 #define HSCIF_SRE      0x8000          /* Sampling Rate Register Enable */
 
+/* SCPCR (Serial Port Control Register), SCIFA/SCIFB only */
+#define SCPCR_RTSC     (1 << 4)        /* Serial Port RTS Pin / Output Pin */
+#define SCPCR_CTSC     (1 << 3)        /* Serial Port CTS Pin / Input Pin */
+
+/* SCPDR (Serial Port Data Register), SCIFA/SCIFB only */
+#define SCPDR_RTSD     (1 << 4)        /* Serial Port RTS Output Pin Data */
+#define SCPDR_CTSD     (1 << 3)        /* Serial Port CTS Input Pin Data */
+
 
 #define SCxSR_TEND(port)       (((port)->type == PORT_SCI) ? SCI_TEND   : SCIF_TEND)
 #define SCxSR_RDxF(port)       (((port)->type == PORT_SCI) ? SCI_RDRF   : SCIF_RDF)