drm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSR
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 18 Sep 2015 17:03:27 +0000 (20:03 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 30 Sep 2015 08:20:15 +0000 (10:20 +0200)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_uncore.c

index 39b92135f549fdaec1324155d8f716c625a9a803..08d78fc55f2b8b990994c5811db8ec2e538d6461 100644 (file)
 #define  GRDOM_RESET_STATUS (1<<1)
 #define  GRDOM_RESET_ENABLE (1<<0)
 
-#define ILK_GDSR 0x2ca4 /* MCHBAR offset */
+#define ILK_GDSR (MCHBAR_MIRROR_BASE + 0x2ca4)
 #define  ILK_GRDOM_FULL                (0<<1)
 #define  ILK_GRDOM_RENDER      (1<<1)
 #define  ILK_GRDOM_MEDIA       (3<<1)
index 14d0831c6156c8d6990954cac907a2435c81726b..b43c6d025ac3a6045783aa2b34d2ee8f4d449325 100644 (file)
@@ -1429,21 +1429,21 @@ static int ironlake_do_reset(struct drm_device *dev)
        struct drm_i915_private *dev_priv = dev->dev_private;
        int ret;
 
-       I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
+       I915_WRITE(ILK_GDSR,
                   ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);
-       ret = wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) &
+       ret = wait_for((I915_READ(ILK_GDSR) &
                        ILK_GRDOM_RESET_ENABLE) == 0, 500);
        if (ret)
                return ret;
 
-       I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
+       I915_WRITE(ILK_GDSR,
                   ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);
-       ret = wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) &
+       ret = wait_for((I915_READ(ILK_GDSR) &
                        ILK_GRDOM_RESET_ENABLE) == 0, 500);
        if (ret)
                return ret;
 
-       I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, 0);
+       I915_WRITE(ILK_GDSR, 0);
 
        return 0;
 }