arm64: perf: fix event number mask

This patch fixes ARMV8_EVTYPE_* macros since evtCount (event number)
field width is 10bits in event selection register.

Signed-off-by: Vinayak Kale <vkale@apm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index cea1594ff933e92e304a6996a4642f18f322487a..5d14470452ac5959712ef9927b3a093bf8975bf3 100644 (file)
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -784,8 +784,8 @@ static const unsigned armv8_pmuv3_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
 /*
  * PMXEVTYPER: Event selection reg
  */
-#define        ARMV8_EVTYPE_MASK       0xc80000ff      /* Mask for writable bits */
-#define        ARMV8_EVTYPE_EVENT      0xff            /* Mask for EVENT bits */
+#define        ARMV8_EVTYPE_MASK       0xc80003ff      /* Mask for writable bits */
+#define        ARMV8_EVTYPE_EVENT      0x3ff           /* Mask for EVENT bits */
 
 /*
  * Event filters for PMUv3
@@ -1175,7 +1175,8 @@ static void armv8pmu_reset(void *info)
 static int armv8_pmuv3_map_event(struct perf_event *event)
 {
        return map_cpu_event(event, &armv8_pmuv3_perf_map,
-                               &armv8_pmuv3_perf_cache_map, 0xFF);
+                               &armv8_pmuv3_perf_cache_map,
+                               ARMV8_EVTYPE_EVENT);
 }
 
 static struct arm_pmu armv8pmu = {