projects / GitHub / moto-9609 / android_kernel_motorola_exynos9610.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 256dd64)
clk: samsung: exynos5250: Correct parent list of audio muxes
authorTomasz Figa <t.figa@samsung.com>
Tue, 15 Oct 2013 17:41:20 +0000 (19:41 +0200)
committerTomasz Figa <t.figa@samsung.com>
Mon, 30 Dec 2013 17:15:49 +0000 (18:15 +0100)
According to SoC documentation, input 5 of mout_audio muxes is connected
to xxti (named fin_pll in the driver). This patch corrects defined
parent arrays to match SoC documentation.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Tomasz Figa <t.figa@samsung.com>
drivers/clk/samsung/clk-exynos5250.c patch | blob | blame | history

diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index 73334b8d9f664fc0a622a4cc8d33268b4391181f..220aa3a5ba74e5a11e4792b30a7bd58df984bcf8 100644 (file)
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -208,19 +208,19 @@ PNAME(mout_group1_p)      = { "fin_pll", "fin_pll", "sclk_hdmi27m",
                                "none", "none", "none",
                                "none" };
 PNAME(mout_audio0_p)   = { "cdclk0", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy",
-                               "sclk_uhostphy", "sclk_hdmiphy",
+                               "sclk_uhostphy", "fin_pll",
                                "mout_mpll_user", "mout_epll", "mout_vpll",
                                "mout_cpll", "none", "none",
                                "none", "none", "none",
                                "none" };
 PNAME(mout_audio1_p)   = { "cdclk1", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy",
-                               "sclk_uhostphy", "sclk_hdmiphy",
+                               "sclk_uhostphy", "fin_pll",
                                "mout_mpll_user", "mout_epll", "mout_vpll",
                                "mout_cpll", "none", "none",
                                "none", "none", "none",
                                "none" };
 PNAME(mout_audio2_p)   = { "cdclk2", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy",
-                               "sclk_uhostphy", "sclk_hdmiphy",
+                               "sclk_uhostphy", "fin_pll",
                                "mout_mpll_user", "mout_epll", "mout_vpll",
                                "mout_cpll", "none", "none",
                                "none", "none", "none",