Bits 3 and 4 of the TSCONFIG register are important for certain hardware
constellations, in that they need to be zeroed. Add a configuration flag
to toggle this.
Signed-off-by: Daniel Scheller <d.scheller@gmx.net>
Acked-by: Abylay Ospan <aospan@netup.ru>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xc4,
((priv->flags & CXD2841ER_TS_SERIAL) ? 0x80 : 0x00), 0x80);
+ /* clear TSCFG bits 3+4 */
+ if (priv->flags & CXD2841ER_TSBITS)
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xc4, 0x00, 0x18);
+
cxd2841er_init_stats(fe);
return 0;
#define CXD2841ER_EARLY_TUNE 16 /* bit 4 */
#define CXD2841ER_NO_WAIT_LOCK 32 /* bit 5 */
#define CXD2841ER_NO_AGCNEG 64 /* bit 6 */
+#define CXD2841ER_TSBITS 128 /* bit 7 */
enum cxd2841er_xtal {
SONY_XTAL_20500, /* 20.5 MHz */