arm: mvebu: PCIe Device Tree informations for Armada XP DB

The Marvell evaluation board (DB) for the Armada XP SoC has 6
physicals full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index e83505e4c236c242eeb13c1094961b622a7646a8..54cc5bb705fb0e1fcb38bbd2d82340ec28473533 100644 (file)
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -121,5 +121,38 @@
                                spi-max-frequency = <20000000>;
                        };
                };
+
+               pcie-controller {
+                       status = "okay";
+
+                       /*
+                        * All 6 slots are physically present as
+                        * standard PCIe slots on the board.
+                        */
+                       pcie@1,0 {
+                               /* Port 0, Lane 0 */
+                               status = "okay";
+                       };
+                       pcie@2,0 {
+                               /* Port 0, Lane 1 */
+                               status = "okay";
+                       };
+                       pcie@3,0 {
+                               /* Port 0, Lane 2 */
+                               status = "okay";
+                       };
+                       pcie@4,0 {
+                               /* Port 0, Lane 3 */
+                               status = "okay";
+                       };
+                       pcie@9,0 {
+                               /* Port 2, Lane 0 */
+                               status = "okay";
+                       };
+                       pcie@10,0 {
+                               /* Port 3, Lane 0 */
+                               status = "okay";
+                       };
+               };
        };
 };