drm/i915: Enable MIPI PHY transparent latch for DSI Port C
authorGaurav K Singh <gaurav.k.singh@intel.com>
Sun, 7 Dec 2014 10:43:54 +0000 (16:13 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 10 Dec 2014 16:47:22 +0000 (17:47 +0100)
Common bit to be used for both DSI Port A & DSI Port C.

Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dsi.c

index 8f8b952eaa9259f22a9aba4a01d325f1b6f153fe..215d00429b04903fa408631de32438799f7a8f89 100644 (file)
@@ -177,7 +177,12 @@ static void intel_dsi_device_ready(struct intel_encoder *encoder)
                usleep_range(2500, 3000);
 
                val = I915_READ(MIPI_PORT_CTRL(port));
-               I915_WRITE(MIPI_PORT_CTRL(port), val | LP_OUTPUT_HOLD);
+
+               /* Enable MIPI PHY transparent latch
+                * Common bit for both MIPI Port A & MIPI Port C
+                * No similar bit in MIPI Port C reg
+                */
+               I915_WRITE(MIPI_PORT_CTRL(PORT_A), val | LP_OUTPUT_HOLD);
                usleep_range(1000, 1500);
 
                I915_WRITE(MIPI_DEVICE_READY(port), ULPS_STATE_EXIT);