PD#SWPL-36213
Problem:
Because 4K 264 used dw0, there is no YUV output buffer,
result this problem.
Solution:
T5 set default double write 3 to resolve this issue
Verify:
T5
Change-Id: I6e8b8de4fc5a1c9089ce0ff270443d014d522df7
Signed-off-by: Peng Yixin <yixin.peng@amlogic.com>
} else
hw->double_write_mode = double_write_mode;
+ if (get_cpu_major_id() == AM_MESON_CPU_MAJOR_ID_T5)
+ hw->double_write_mode = 3;
+
if (force_config_fence) {
hw->enable_fence = true;
hw->fence_usage = (force_config_fence >> 4) & 0xf;
hw->canvas_mode = pdata->canvas_mode;
}
- if (hw->mmu_enable)
+ if (hw->mmu_enable) {
+ hw->canvas_mode = CANVAS_BLKMODE_LINEAR;
hw->double_write_mode &= 0xffff;
+ }
if (pdata->parallel_dec == 1) {
int i;