drm/radeon/dpm: add debugfs support for cayman
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 28 Jun 2013 21:49:02 +0000 (17:49 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 1 Jul 2013 20:08:57 +0000 (16:08 -0400)
This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/ni_dpm.c
drivers/gpu/drm/radeon/nid.h
drivers/gpu/drm/radeon/radeon_asic.c
drivers/gpu/drm/radeon/radeon_asic.h

index 4712851808a3e13cec4d5485b8836041e503fe0c..8497ca6bb0b160cdd54d70d0faab2cc8b9f7480e 100644 (file)
@@ -4287,6 +4287,26 @@ void ni_dpm_print_power_state(struct radeon_device *rdev,
        r600_dpm_print_ps_status(rdev, rps);
 }
 
+void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
+                                                   struct seq_file *m)
+{
+       struct radeon_ps *rps = rdev->pm.dpm.current_ps;
+       struct ni_ps *ps = ni_get_ps(rps);
+       struct rv7xx_pl *pl;
+       u32 current_index =
+               (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_INDEX_MASK) >>
+               CURRENT_STATE_INDEX_SHIFT;
+
+       if (current_index >= ps->performance_level_count) {
+               seq_printf(m, "invalid dpm profile %d\n", current_index);
+       } else {
+               pl = &ps->performance_levels[current_index];
+               seq_printf(m, "uvd    vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
+               seq_printf(m, "power level %d    sclk: %u mclk: %u vddc: %u vddci: %u\n",
+                          current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
+       }
+}
+
 u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low)
 {
        struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
index 95693c77351d9074157e4f82c115293e1c6d4231..fe24a93542ecdb654c5a5597611ff76ff341ef00 100644 (file)
 #       define MRDCKD0_BYPASS                           (1 << 30)
 #       define MRDCKD1_BYPASS                           (1 << 31)
 
+#define TARGET_AND_CURRENT_PROFILE_INDEX                  0x66c
+#       define CURRENT_STATE_INDEX_MASK                   (0xf << 4)
+#       define CURRENT_STATE_INDEX_SHIFT                  4
+
 #define CG_AT                                           0x6d4
 #       define CG_R(x)                                 ((x) << 0)
 #       define CG_R_MASK                               (0xffff << 0)
index 69165474090658aa2d6e92add243d4748bc5de44..5b3a122912f79743c2912d0c373276dfa475e450 100644 (file)
@@ -1936,6 +1936,7 @@ static struct radeon_asic cayman_asic = {
                .get_sclk = &ni_dpm_get_sclk,
                .get_mclk = &ni_dpm_get_mclk,
                .print_power_state = &ni_dpm_print_power_state,
+               .debugfs_print_current_performance_level = &ni_dpm_debugfs_print_current_performance_level,
        },
        .pflip = {
                .pre_page_flip = &evergreen_pre_page_flip,
index 5904d897586d8a3789d8b9fbd803a2ca29142707..7524edb261521c38fd2c046cac9f77ef42e52f3d 100644 (file)
@@ -613,6 +613,8 @@ u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low);
 u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low);
 void ni_dpm_print_power_state(struct radeon_device *rdev,
                              struct radeon_ps *ps);
+void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
+                                                   struct seq_file *m);
 int trinity_dpm_init(struct radeon_device *rdev);
 int trinity_dpm_enable(struct radeon_device *rdev);
 void trinity_dpm_disable(struct radeon_device *rdev);