This patch fixes the following kernel crash during SGMII based 1GbE probe.
BUG: Bad page state in process swapper/0 pfn:
40fe6ad
page:
ffffffbee37a75d8 count:-1 mapcount:0 mapping: (null) index:0x0
flags: 0x0()
page dumped because: nonzero _count
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0+ #7
Call trace:
[<
ffffffc000087fa0>] dump_backtrace+0x0/0x12c
[<
ffffffc0000880dc>] show_stack+0x10/0x1c
[<
ffffffc0004d981c>] dump_stack+0x74/0xc4
[<
ffffffc00012fe70>] bad_page+0xd8/0x128
[<
ffffffc000133000>] get_page_from_freelist+0x4b8/0x640
[<
ffffffc000133260>] __alloc_pages_nodemask+0xd8/0x834
[<
ffffffc0004194f8>] __netdev_alloc_frag+0x124/0x1b8
[<
ffffffc00041bfdc>] __netdev_alloc_skb+0x90/0x10c
[<
ffffffc00039ff30>] xgene_enet_refill_bufpool+0x11c/0x280
[<
ffffffc0003a11a4>] xgene_enet_process_ring+0x168/0x340
[<
ffffffc0003a1498>] xgene_enet_napi+0x1c/0x50
[<
ffffffc00042b454>] net_rx_action+0xc8/0x18c
[<
ffffffc0000b0880>] __do_softirq+0x114/0x24c
[<
ffffffc0000b0c34>] irq_exit+0x94/0xc8
[<
ffffffc0000e68a0>] __handle_domain_irq+0x8c/0xf4
[<
ffffffc000081288>] gic_handle_irq+0x30/0x7c
This was due to hardware resource sharing conflict with the firmware. This
patch fixes this crash by using resources (descriptor ring, prefetch buffer)
that are not shared.
Signed-off-by: Iyappan Subramanian <isubramanian@apm.com>
Signed-off-by: Keyur Chudgar <kchudgar@apm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
struct device *dev = ndev_to_dev(ndev);
struct xgene_enet_desc_ring *rx_ring, *tx_ring, *cp_ring;
struct xgene_enet_desc_ring *buf_pool = NULL;
- u8 cpu_bufnum = 0, eth_bufnum = 0;
- u8 bp_bufnum = 0x20;
- u16 ring_id, ring_num = 0;
+ u8 cpu_bufnum = 0, eth_bufnum = START_ETH_BUFNUM;
+ u8 bp_bufnum = START_BP_BUFNUM;
+ u16 ring_id, ring_num = START_RING_NUM;
int ret;
/* allocate rx descriptor ring */
#define SKB_BUFFER_SIZE (XGENE_ENET_MAX_MTU - NET_IP_ALIGN)
#define NUM_PKT_BUF 64
#define NUM_BUFPOOL 32
+#define START_ETH_BUFNUM 2
+#define START_BP_BUFNUM 0x22
+#define START_RING_NUM 8
#define PHY_POLL_LINK_ON (10 * HZ)
#define PHY_POLL_LINK_OFF (PHY_POLL_LINK_ON / 5)