#endif
};
-static struct irq_domain irq_domain;
+static struct irq_domain *irq_domain;
static void __iomem *regs;
static u32 tegra_gpio_bank_count;
static struct tegra_gpio_bank *tegra_gpio_banks;
static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
{
- return irq_domain_to_irq(&irq_domain, offset);
+ return irq_find_mapping(irq_domain, offset);
}
static struct gpio_chip tegra_gpio_chip = {
dev_err(&pdev->dev, "Couldn't allocate IRQ numbers\n");
return -ENODEV;
}
- irq_domain.irq_base = irq_base;
- irq_domain.nr_irq = tegra_gpio_chip.ngpio;
- irq_domain.ops = &irq_domain_simple_ops;
- irq_domain.of_node = pdev->dev.of_node;
- irq_domain_add(&irq_domain);
+ irq_domain = irq_domain_add_legacy(pdev->dev.of_node,
+ tegra_gpio_chip.ngpio, irq_base, 0,
+ &irq_domain_simple_ops, NULL);
for (i = 0; i < tegra_gpio_bank_count; i++) {
res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
gpiochip_add(&tegra_gpio_chip);
for (gpio = 0; gpio < tegra_gpio_chip.ngpio; gpio++) {
- int irq = irq_domain_to_irq(&irq_domain, gpio);
+ int irq = irq_find_mapping(irq_domain, gpio);
/* No validity check; all Tegra GPIOs are valid IRQs */
bank = &tegra_gpio_banks[GPIO_BANK(gpio)];