local_irq_restore(flags);
}
-static int
-imxdma_config_channel_hw(struct imxdma_channel *imxdmac, unsigned int config_port,
- unsigned int config_mem, unsigned int dmareq, int hw_chaining)
-{
- int channel = imxdmac->channel;
- u32 dreq = 0;
-
- imxdmac->internal.hw_chaining = 0;
-
- if (hw_chaining) {
- imxdmac->internal.hw_chaining = 1;
- if (!imxdma_hw_chain(&imxdmac->internal))
- return -EINVAL;
- }
-
- if (dmareq)
- dreq = CCR_REN;
-
- imxdmac->internal.ccr_from_device = config_port | (config_mem << 2) | dreq;
- imxdmac->internal.ccr_to_device = config_mem | (config_port << 2) | dreq;
-
- imx_dmav1_writel(dmareq, DMA_RSSR(channel));
-
- return 0;
-}
-
static int
imxdma_setup_sg_hw(struct imxdma_desc *d,
struct scatterlist *sg, unsigned int sgcount,
{
struct imxdma_channel *imxdmac = to_imxdma_chan(chan);
struct dma_slave_config *dmaengine_cfg = (void *)arg;
- int ret;
unsigned long flags;
unsigned int mode = 0;
mode = IMX_DMA_MEMSIZE_32;
break;
}
- ret = imxdma_config_channel_hw(imxdmac,
- mode | IMX_DMA_TYPE_FIFO,
- IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR,
- imxdmac->dma_request, 1);
- if (ret)
- return ret;
+ imxdmac->internal.hw_chaining = 1;
+ if (!imxdma_hw_chain(&imxdmac->internal))
+ return -EINVAL;
+ imxdmac->internal.ccr_from_device =
+ (mode | IMX_DMA_TYPE_FIFO) |
+ ((IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) << 2) |
+ CCR_REN;
+ imxdmac->internal.ccr_to_device =
+ (IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) |
+ ((mode | IMX_DMA_TYPE_FIFO) << 2) | CCR_REN;
+ imx_dmav1_writel(imxdmac->dma_request,
+ DMA_RSSR(imxdmac->channel));
+
/* Set burst length */
imx_dmav1_writel(imxdmac->watermark_level * imxdmac->word_size,
DMA_BLR(imxdmac->channel));