ARM64: dts: meson-gxm: add SCPI configuration for GXM

This adds the SCPI DVFS clock index and configures the CPU cores
accordingly.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
index eb2f0c3e5e538e4bebf211512bccd4a8eaab02b5..4c55665a253f40a0cce28a1103defa176f097da0 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
@@ -85,6 +85,7 @@
                        reg = <0x0 0x100>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                cpu5: cpu@101 {
@@ -93,6 +94,7 @@
                        reg = <0x0 0x101>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                cpu6: cpu@102 {
@@ -101,6 +103,7 @@
                        reg = <0x0 0x102>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       clocks = <&scpi_dvfs 1>;
                };
 
                cpu7: cpu@103 {
@@ -109,10 +112,17 @@
                        reg = <0x0 0x103>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       clocks = <&scpi_dvfs 1>;
                };
        };
 };
 
+&scpi_dvfs {
+       clock-indices = <0 1>;
+       clock-output-names = "vbig", "vlittle";
+};
+
 &vpu {
        compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
 };
+